SCHEMATIC DIAGRAM − SERVO Section (2/2) − •
5-6.
(2/2)
Z1
Z2
Z3
Z4
Z5
Z6
Z7
Z8
Z9
Z10
LOADING MOTOR DRIVE
OUT1
GND
VM
OUT2
VCC
VREF
FIN
RIN
TP78
TP77
R43
IC6
R47
(LO-)
(LO+)
100
BA6287F-T1
100
C63
0.1
Z11
(Page 22)
Z13
Z14
Z15
Z16
Z17
•
See page 29 for Waveform.
See page 32 for IC Block Diagram.
R50
1k
DISC_IN
R62
47k
LOAD_END
R61
47k
LIMIT
R60
47k
Q3
MSD601-RT1
R45
REFERENCE
100
VOLTAGE
REGULATOR
C64
R94
0.01
100k
D1
MM3Z5V6ST1
C62
0.1
NC
XIA
X2
6
18.43MHz
XOA
R44
VSS
0
X0
X1
VCC
NC
EJECT
EJECT
LOAD
LOAD
NC
LIMIT
LIMIT_IN
LOAD_END
LOAD_END
INIT1
C81
C80
0.1
0.1
INIT2
INIT3
NC
MD_ON
MD_ON
R42
100
MD_RST
R36
100
SENS
NC
R32
NC
100
MNT2
R31
NC
100
FOK
•
See page 37 for IC Pin Function Description.
R92
33k
C83
0.1
R91
R58
R63
R66
C78
30k
100
100
100
0.01
BU_IN
R67
100
BUS_ON
MD2
MD1
MD0
CC-XINT
R68
NC
100
NC
NC
R77
NC
680
REF_LEVEL
VSS
R76
NC
470k
MD MECHANISM CONTROLLER
NC
IC7
NC
MB90473PFV-G-157
-BNDE1
NC
AVSS
AVRH
AVCC
NC
NC
NC
NC
NC
FLASH_W
TXD
C68
R25
0.1
100k
R65
100
23
23
DISC_EXIST
MD_ON
EJECT-OK
MDMON
OPEN_REQ
LINKOFF
BUS-ON
A-ATT
BU-IN
UNISI
UNISO
UNICLK
C70
47
4V
TXD
BP5
RXD
BP6
RSTX
Q2
MSD601-RT1
PEAK
L5
0
HOLD
C71
1
C69
0.1
R70
100k
TXD
R69
100k
MDX-F5800
CN5
30P
DISC_EXIST
MD-ON
EJECT_OK
MECHA-ON
OPEN_REQ
LINK_OFF
BUS_ON
A-ATT
B/U_CHECK
A-GND
UNISI
A3.3V
UNISO
A
DGND
UNICK
D3.3V
(2/3)
TXD
(Page 27)
NC
LCH
FLASH-W
AUDIO_GND
RXD
RCH
LO_6V
SYS_RST
DRIVER_5V
B/U_3V
DRIVER_GND
B/U_GND
DRIVER_GND