Table 6-6: I/O Hex Address; Table 6-7: Dma Channel 3 Through 0 - Datatech Enterprises Apex 386SX/20 User Manual

The addresses for the page register are as follows:

Table 6-6: I/O Hex Address

Address generation for the DMA channels is as follows:

Table 6-7: DMA Channel 3 Through 0

Note: To generate the addressing signal "byte high enable" (BHE),
invert address line AO.
Table 6-8: DMA Channels 7 Through 5
Note: The BHE and A0 addressing signals are forced to a logical 0.
DMA channel addresses do not increase or decrease through page
boundaries 64KB for channels 0 through 3 and 128KB for channels 5
through 7.
Chapter 6: Appendix
22
Page Register
I/O Hex Address
DMA Channel 0
DMA Channel 1
DMA Channel 2
DMA Channel 3
DMA Channel 5
DMA Channel 6
DMA Channel 7
Refresh
0087
0083
0081
0082
0088
0089
008A
008F