Digital Signal Paths - Alesis MicroVerb Service Manual

4.0 Digital Signal Paths

4.1 The DASP 16 ASIC
Diagram 1
Below is a description of the most important DASP-16 pins.
Pin #(s)
61-68, 2-11 BDRAM0-15
10-17, 19-26 DAC0-15
27 SNHINH
28 ADCDATA
30 CLOCK
31 ERROR
32 LSTMSB
33-34, 36-41 EPRMDATA0-7
42-49 EPRMADR0-7
50 WRN
51 CAS
53-60 DRAMADR0-7
MicroVerb/MicroVerb II Service Manual 1.00
Name
DRAM Data buss.
DAC Data outputs.
Controls sample and hold circuit timing.
A/D comparison input.
ASIC Clock input (6MHz for MicroVerb or 8Mhz for MicroVerb II)
This signal indicates a math overflow condition, and consequently turns on the clip LED circuit.
This signal indicates the last state of the MSB (the sign bit in two's complement math). This signal, in conjunction
with R27, R29, R44, and C17, is used to bias the incoming analog signal slightly positive, or negative, depending
on the result of the last DAC cycle (i.e. if the last DAC cycle started off with a negative value, LSTMSB will be 1,
causing the input to the sample and hold circuit to pull slightly positive. On the next cycle, the reverse will occur).
This reduces any audio pop during the attack portion of the input signal, and allows for a faster response to small
signals.
EPROM Data buss.
EPROM Address buss.
Write ENable line to DRAMs.
Column Address Strobe to DRAM.
DRAM Address buss.
Diagram 2
Function
2 3/7/2003