Denon PMA-1600NE Service Manual page 27

Terminal Function
Pin
Pin Name Signal Name
No.
1 P9_4/DA1/TB4IN SO_DI
2 P9_3/DA0/TB3IN CD_DI
3 P9_2/TB2IN/SOUT3 DAC_MOSI
4 P9_1/TB1IN/SIN3 DAC_CS
5 P9_0/TB0IN/CLK3 DAC_CLK
6 BYTE GND
7 CNVSS CNVSS
8 P8_7/XCIN LED_GREEN
9 P8_6/XCOUT EXT.PRE RELAY
10 *RESET RESET
11 XOUT XOUT
12 VSS GND
13 XIN XIN
14 VCC1 VCC
15 P8_5/*NMI NMI
16 P8_4/*INT2/ZP KEY_ON (INT)
17 P8_3/*INT1 DIR1_CFLUG
18 P8_2/*INT0 P_DOWN (P_OFF)
19 P8_1/TA4IN/*U SPK-OUT
20 P8_0/TA4OUT/U USB-B MODE
21 P7_7/TA3IN SIG_TIMER
22 P7_6/TA3OUT LED_STBY (STB_LED)
23 P7_5/TA2IN/*W USBB_DSD_PCM
24 P7_4/TA2OUT/W PROT-2
25 P7_3/*CTS2/*RTS2/TA1IN/*V VOLTAGE_PROTECT
26 P7_2/CLK2/TA1OUT/V PROT-1
27 P7_1/RXD2/SCL2/TA0IN/TB5IN (*OD) DIR1_NPCM
28 P7_0/TXD2/SDA2/TA0OUT (*OD) NC
29 P6_7/TXD1/SDA1 TXD
30 P6_6/RXD1/SCL1 RXD
31 P6_5/CLK1 SCLK
32 P6_4/*CTS1/*RTS1/*CTS0/CLKS1 BUSY
33 P6_3/TXD0/SDA0 78212_DI
34 P6_2/RXD0/SCL0 78212_CE
35 P6_1/CLK0 78212_CK
36 P6_0/*CTS0/*RTS0 M_MUTE
37 P5_7/*RDY/CLKOUT MM/MC_RL
38 P5_6/ALE NC
39 P5_5/*HOLD EPM
40 P5_4/*HLDA E2P_CK
41 P5_3/BCLK E2P_DO
42 P5_2/*RD E2P_DI
43 P5_1/*WRH/*BHE E2P_CS
44 P5_0/*WRL/*WR CE
45 P4_7/*CS3 M_B_DOWN
46 P4_6/*CS2 DET
47 P4_5/*CS1 MM/MC_DET
48 P4_4/*CS0 ANA_MODE
49 P4_3/A19 I2C_SCL_IN
50 P4_2/A18 I2C_SDA_IN
51 P4_1/A17 FPGA_VER_CONT
52 P4_0/A16 PCM or DSD
53 P3_7/A15 DAC_RST
I/O Initial Note
SOURCR DIRECT Relay Control (H/L=Source Direc/
O L
Tone)
O L CD DIRECT Relay Control (H/L=CD/Other)
O L DAC control (PCM1795)
O H DAC control (PCM1795)
O H DAC control (PCM1795)
I - GND
I - UPDATE
O H POWER LED (GREEN) control H/L = LED ON/OFF
O L EXT.PRE Reley control H/L = EXT.PRE ON/OFF
I - RESET_IN
O - XOUT
I - GND
I - XIN
I - VCC
I - not use
I - Interrupt
I H DIR control (PCM9211)
I H P_DOWN detect
O H Speaker Relay On (H/L=Speaker ON/OFF)
O L FPGA control
O L NJU7181 Timmer Reset
O L STANDBY LED control (H/L=RED/off)
I L XMOS
I - Voltage Abnormal Detect
I - Digital circuit VOLTAGE_PROTECT
I - DC Offset / Over Current Detection
I L DIR control (PCM9211)
O L not use
O for Update
I for Update
O L for debug
O L for debug
O L FUNCTION SEL Data output (LC78212)
O L FUNCTION SEL CE output (LC78212)
O L FUNCTION SEL Clock output (LC78212)
O H Manual Mute (H/L=Mute ON/OFF)
O L MM/MC Relay Control (H/L=MM/MC)
O L not use
O L for Update
O L E2P_CLK
I L E2P_DO
O L E2P_DI
O L E2P_CS
O L dor debug
I H Checking port for amp power supply off confirm
Signal Detection input (H/L=Signal detect/No
I -
signal)
I - MM/MC Slide Switch Detect (H/L=MM/MC)
"ANALOG MODE Relay On/Off
O L
ANALOG MODE ON/OFF = L/H"
I H USBB SDA MONITOR
I H USBB SCL MONITOR
O H FPGA control
O L FPGA control
O H DAC control (PCM1795)
Pin
Pin Name Signal Name
No.
54 P3_6/A14 FRES
55 P3_5/A13 SPDIF MODE
56 P3_4/A12 ANA_LED
57 P3_3/A11 SO_DI_LED
58 P3_2/A10 NC
59 P3_1/A9 DIR1_RST
60 VCC2 Vcc
61 P3_0/A8(/-/D7) NC
62 VSS GND
63 P2_7/AN2_7/A7(/D7/D6) DIR1_CIDO
64 P2_6/AN2_6/A6(/D6/D5) DIR1_CK
65 P2_5/AN2_5/A5(/D5/D4) DIR1_CE
66 P2_4/AN2_4/A4(/D4/D3) DIR1_CODI
67 P2_3/AN2_3/A3(/D3/D2) FS0
68 P2_2/AN2_2/A2(/D2/D1) FS1
69 P2_1/AN2_1/A1(/D1/D0) AL32_SIG_SEL
70 P2_0/AN2_0/A0(/D0/-) AL32_EMPHA
71 P1_7/D15/*INT5 USBB_MUTE
72 P1_6/D14/*INT4 USBB_INT_REQ_N
73 P1_5/D13/*INT3 REMOTE (RC5_IN)
74 P1_4/D12 AL32_TEST3
75 P1_3/D11 AL32_TEST4
76 P1_2/D10 AL32_TEST5
77 P1_1/D9 A_MUTE
78 P1_0/D8 PCONT (P_ON)
79 P0_7/AN0_7/D7 MODE(PCM/DSD)
80 P0_6/AN0_6/D6 NC
81 P0_5/AN0_5/D5 DESTINATION_SEL
82 P0_4/AN0_4/D4 VOL_DOWN
83 P0_3/AN0_3/D3 VOL_UP
84 P0_2/AN0_2/D2 NC
85 P0_1/AN0_1/D1 FCEN
AD32 Reset (FPGA_RE-
86 P0_0/AN0_0/D0
SERVE1)
87 P10_7/AN7/*KI3 I2C_SDA
88 P10_6/AN6/*KI2 I2C_SCL
89 P10_5/AN5/*KI1 KEY1 (TACT)
90 P10_4/AN4/*KI0 SEL
91 P10_3/AN3 USBB_RST
92 P10_2/AN2 USB-B_DETECT
93 P10_1/AN1 FPGA_RESERVE2
94 AVSS AVSS
95 P10_0/AN0 FPGA_RESERVE3
96 VREF VREF
97 AVCC AVCC
98 P9_7/*ADTRG/SIN4 FPGA_RESERVE4
99 P9_6/ANEX1/SOUT4 FDAT
100 P9_5/ANEX0/CLK4 FCLK
27
I/O Initial Note
O H FL Display Reset
O L FPGA control
O L LED control (Analog Mode LED ON/OFF = H/L)
O L LED control (Source Direct LED ON/OFF = H/L)
O L not use
O H DIR control (PCM9211)
I - VCC
O L not use
I - GND
I H DIR control (PCM9211)
O L DIR control (PCM9211)
O H DIR control (PCM9211)
O L DIR control (PCM9211)
O L USB-DAC control
O L USB-DAC control
O L USB-DAC control
O L USB-DAC control
I H USB-DAC control
I H USBB_INT (DCD-SX11 102pin)
I - REMOTE IN
O L FPGA control
O H FPGA control
O L FPGA control
AMUTE (Mute for Digital input) (H/L=Mute OFF/
O H
ON)
POWER ON/STANDBY control (H/L=Power ON/
O H
OFF)
O H MCLK select (H/L=DSD/PCM)
O L not use
Auto Standby default setting H/L=Auto Standby
I -
ON/OFF
O L Volume Down
O L Volume Up
O L not use
O H FL Display Chip select
O FPGA control
I/O USB-DAC control
I/O USB-DAC control
I - KEY1 (Front tact SW)
I - Front input Selector SW (A/D input)
O USB-DAC control
I USB-DAC VBUS detect
O FPGA control
I - GND
O FPGA control
I - VCC
I - VCC
O FPGA control
O H FL Display Data
O H FL Display CLK