Denon AVR-X2300W Service Manual page 54

Integrated network av receiver
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AD8195
AD8195ACPZ (HDMI : U1022)
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
IN0
1
PIN 1
IN0
1
IP0
2
INDICATOR
PIN 1
IP0
2
INDICATOR
IN1
3
IN1
3
IP1
4
IP1
4
VTTI
5
VTTI
5
IN2
6
IN2
6
IP2
IP2
7
7
IN3
IN3
8
8
IP3
9
IP3
9
AVCC
10
AVCC
10
NOTES
1. THE AD8195 LFCSP HAS AN EXPOSED PAD ON THE UNDERSIDE OF
NOTES
THE PACKAGE THAT AIDS IN HEAT DISSIPATION. THE PAD MUST BE
1. THE AD8195 LFCSP HAS AN EXPOSED PAD ON THE UNDERSIDE OF
ELECTRICALLY CONNECTED TO THE AVEE SUPPLY PLANE IN ORDER
TO MEET THERMAL SPECIFICATIONS.
THE PACKAGE THAT AIDS IN HEAT DISSIPATION. THE PAD MUST BE
ELECTRICALLY CONNECTED TO THE AVEE SUPPLY PLANE IN ORDER
TO MEET THERMAL SPECIFICATIONS.
AD8195ACPZ Terminl Function
Table 6. Pin Function Descriptions
Pin No.
Mnemonic
Type
1
1
IN0
HS I
2
IP0
HS I
3
IN1
HS I
4
IP1
HS I
5
VTTI
Power
6
IN2
HS I
7
IP2
HS I
8
IN3
HS I
9
IP3
HS I
10, 16, 22, 23, 25, 26, 30
AVCC
Power
11
ON0
HS O
12
OP0
HS O
13
VTTO
Power
14
ON1
HS O
15
OP1
HS O
17
ON2
HS O
18
OP2
HS O
19
ON3
HS O
20
OP3
HS O
21
COMP
Control
24, 27, 37, Exposed Pad
AVEE
Power
28
TX_EN
Control
29
PE_EN
Control
31
CEC_OUT
LS I/O
32
AMUXVCC
Power
AD8195ACPZ Block diagram
PARALLEL
VTTI
+
4
IP[3:0]
4
IN[3:0]
VREF_IN
SCL_IN
SDA_IN
CEC_IN
30 AVCC
30 AVCC
29 PE_EN
29 PE_EN
28 TX_EN
28 TX_EN
27 AVEE
27 AVEE
26 AVCC
AD8195
26 AVCC
AD8195
TOP VIEW
25 AVCC
TOP VIEW
25 AVCC
(Not to Scale)
(Not to Scale)
24 AVEE
24 AVEE
23 AVCC
23 AVCC
22 AVCC
22 AVCC
21 COMP
21 COMP
Figure 3. Pin Configuration
Description
High Speed Input Complement.
High Speed Input.
High Speed Input Complement.
High Speed Input.
Input Termination Supply. Nominally connected to AVCC.
High Speed Input Complement.
High Speed Input.
High Speed Input Complement.
High Speed Input.
Positive Analog Supply. 3.3 V nominal.
High Speed Output Complement.
High Speed Output.
Output Termination Supply. Nominally connected to AVCC.
High Speed Output Complement.
High Speed Output.
High Speed Output Complement.
High Speed Output.
High Speed Output Complement.
High Speed Output.
Power-On Compensation Pin. Bypass to ground through a 10 μF capacitor.
Negative Analog Supply. 0 V nominal.
High Speed Output Enable Parallel Interface.
High Speed Preemphasis Enable Parallel Interface.
CEC Output Side.
Positive Auxiliary Buffer Supply. 5 V nominal.
Rev. 0 | Page 6 of 20
AVCC
AD8195
AMUXVCC
AVEE
CONTROL
LOGIC
VTTO
4
+
OP[3:0]
BUFFER
4
EQ
PE
ON[3:0]
HIGH SPEED
BUFFERED
VREF_OUT
SCL_OUT
2
2
SDA_OUT
CEC_OUT
LOW SPEED
BUFFERED
BIDIRECTIONAL
www.ti.com
PCM9211 (HDMI : U1040)
ERROR/INT0
1
NPCM/INT1
2
MPIO_A0
3
MPIO_A1
4
MPIO_A2
5
MPIO_A3
6
MPIO_C0
7
MPIO_C1
8
MPIO_C2
9
MPIO_C3
10
MPIO_B0
11
MPIO_B1
12
PIN
PIN Functions
NO.
NAME
I/O
TOLERANT
PIN
1
ERROR/INT0
O
2
NPCM/INT1
O
5-V
3
MPIO_A0
I/O
NO.
NAME
I/O
4
MPIO_A1
I/O
TOLERANT
5
MPIO_A2
I/O
6
MPIO_A3
I/O
1 ERROR/INT0
O
No
7
MPIO_C0
I/O
8
MPIO_C1
I/O
2 NPCM/INT1
O
No
9
MPIO_C2
I/O
10
MPIO_C3
I/O
3 MPIO_A0
I/O
Yes
11
MPIO_B0
I/O
12
MPIO_B1
I/O
4 MPIO_A1
I/O
Yes
13
MPIO_B2
I/O
14
MPIO_B3
I/O
5 MPIO_A2
I/O
Yes
15
MPO0
O
(1) Schmitt trigger input
6 MPIO_A3
I/O
Yes
Copyright © 2010, Texas Instruments Incorporated
7 MPIO_C0
I/O
Yes
8 MPIO_C1
I/O
Yes
9 MPIO_C2
I/O
Yes
10 MPIO_C3
I/O
Yes
11 MPIO_B0
I/O
Yes
12 MPIO_B1
I/O
Yes
13 MPIO_B2
I/O
Yes
14 MPIO_B3
I/O
Yes
15 MPO0
O
No
16 MPO1
O
No
17 DOUT
O
No
18 LRCK
O
No
19 BCK
O
No
20 SCKO
O
No
21 DGND
22 DVDD
23 MDO/ADR0
I/O
Yes
54
PCM9211
SBAS495 – JUNE 2010
PIN CONFIGURATIONS
PT PACKAGE
LQFP-48
(TOP VIEW)
48
47
46
45
44
43
42
41
40
39
38
37
36
VDDRX
35
RXIN1
RST
34
33
RXIN2
32
RXIN3
31
RXIN4/ASCKIO
PCM9211
RXIN5/ABCKIO
30
RXIN6/ALRCKIO
29
28
RXIN7/ADIN0
27
MODE
26
MS/ADR1
MC/SCL
25
13
14
15
16
17
18
19
20
21
22
23
24
PIN FUNCTIONS
5-V
DESCRIPTION
No
DIR Error detection output / Interrupt0 output
No
DIR Non-PCM detection output / Interrupt1 output
(1)
DESCRIPTION
Yes
Multipurpose I/O, Group A
(1)
Yes
Multipurpose I/O, Group A
Yes
Multipurpose I/O, Group A
(1)
(1)
Yes
Multipurpose I/O, Group A
DIR Error detection output / Interrupt0 output
Yes
Multipurpose I/O, Group C
(1)
(1)
Yes
Multipurpose I/O, Group C
DIR Non-PCM detection output / Interrupt1 output
Yes
Multipurpose I/O, Group C
(1)
Yes
Multipurpose I/O, Group C
(1)
Multipurpose I/O, Group A(1)
(1)
Yes
Multipurpose I/O, Group B
Yes
Multipurpose I/O, Group B
(1)
Multipurpose I/O, Group A(1)
(1)
Yes
Multipurpose I/O, Group B
Yes
Multipurpose I/O, Group B
(1)
Multipurpose I/O, Group A(1)
No
Multipurpose output 0
Multipurpose I/O, Group A(1)
Submit Documentation Feedback
7
Multipurpose I/O, Group C(1)
Product Folder Link(s):
PCM9211
Multipurpose I/O, Group C(1)
Multipurpose I/O, Group C(1)
Multipurpose I/O, Group C(1)
Multipurpose I/O, Group B(1)
Multipurpose I/O, Group B(1)
Multipurpose I/O, Group B(1)
Multipurpose I/O, Group B(1)
Multipurpose output 0
Multipurpose output 1
Main output port, serial digital audio data output
Main output port, LR clock output
Main output port, Bit clock output
Main output port, System clock output
Ground, for digital
Power supply, 3.3 V (typ.), for digital
Software control I/F, SPI data output / I2C slave address
setting0(2)

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