J3: Primary Analog Interface Pinout; J1: Secondary Analog Interface Pinout - Texas Instruments ADS1 7 EVM-PDK Series User Manual

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Analog input sources (Channels 5-8) are connected directly to J1. These inputs can be filtered by
installing passive components in the option filter circuitry. By default, the resistors are populated with 0Ω
resistors and the capacitors are not installed. No circuitry is provided to buffer these signals before
connecting to the converter.
Description
Analog Input Channel 4 Negative
Analog Input Channel 3 Negative
Analog Input Channel 2 Negative
Analog Input Channel 1 Negative
Analog Ground
Analog Ground
Analog Ground
Not used for this design
Analog Ground
Analog Ground
(1)
Pin 1 is top left-hand corner, located next to reference designator.
Description
Not used for this design
Analog Input Channel 8 Negative
Analog Input Channel 7 Negative
Analog Input Channel 6 Negative
Analog Input Channel 5 Negative
(1)
Pin 1 is top right-hand corner, located next to reference designator.
5.5
Digital Interface
The digital signals are controlled via DSP interface or I
allow control via hardware or software methods. See
operation. The digital control signals can be applied directly to the EVM or by connecting the EVM to a
DSP or micro controller interface board, such as the MMB0 if purchased as part of the
ADS1278EVM-PDK, the
Instruments. For a list of compatible interface and/or accessory boards for the EVM or the ADS1278, see
the relevant product folder on the TI web site.
5.5.1
Digital Format Control
The ADS1278 allows the serial interface to be used in two different formats: an SPI-compatible mode and
a frame-sync format. Switch S6 switches between these two formats:
SPI format configures the signals as follows:
SBAU197 – February 2012
Submit Documentation Feedback
Table 6. J3: Primary Analog Interface Pinout
Signal
ANN4
ANN3
ANN2
ANN1
AGND
AGND
AGND
Not Connected
AGND
AGND
Table 7. J1: Secondary Analog Interface Pinout
Signal
Not Connected
ANN8
ANN7
ANN6
ANN5
5-6K Interface
or
HPA-MCUInterface
Copyright © 2012, Texas Instruments Incorporated
Pin Number
Signal
(1)
J3.1
J3.2
ANP4
J3.3
J3.4
ANP3
J3.5
J3.6
ANP2
J3.7
J3.8
ANP1
J3.9
J3.10
Not Connected
J3.11
J3.12
Analog Ground
J3.13
J3.14
Not Connected
J3.15
J3.16
Not Connected
J3.17
J3.18
EXTREFN
J3.19
J3.20
EXTREFP
Pin Number
Signal
(1)
J3.1
J3.2
Not Connected
J3.3
J3.4
ANP8
J3.5
J3.6
ANP7
J3.7
J3.8
ANP6
J3.9
J3.10
ANP5
2
C ICs on the EVM. Some of the digital control pins
Section 5.2
for details on these pins and their
boards which are available from Texas
ADS1278EVM Hardware Details
Description
Analog Input Channel
4 Positive
Analog Input Channel
3 Positive
Analog Input Channel
2 Positive
Analog Input Channel
1 Positive
Not used for this
design
AGND
Not used for this
design
Not used for this
design
External Reference
negative input
External Reference
positive input
Description
Not used for this
design
Analog Input Channel
8 Positive
Analog Input Channel
7 Positive
Analog Input Channel
6 Positive
Analog Input Channel
5 Positive
ADS1x7xEVM-PDK
13

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