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2.3 Digital Interface and Clock Inputs
This section details the digital interface connections and clocking options for the ADS9227EVM.
2.3.1 Digital Interface Connections
The ADS9227 uses both SPI and LVDS type interfaces. The SPI is a CMOS interface that is used to configure
the internal device registers and consists of SCLK, SDI, SDO, CS, and SPI_EN. For data capture, the ADS9227
uses a source-synchronous LVDS interface. Data for each channel are output on a dedicated differential signal
pair (DOUTP/M_A and DOUTP/M_B). In addition, the device outputs both a differential frame clock (FCLKP/M)
and data clock (DCLKP/M) back to the host with the conversion data. This type of interface makes sure that
propagation delays are consistent between the data output, frame clock, and data clock, improving timing
closures at the host. Both the SPI and LVDS interface signals connect to the FMC connector on the EVM.
2-6
provides the FMC connector signal definition. These signals are also available via test points for scope
measurements as indicated in PCB silkscreen.
The FMC connector pinout below can also be interfaced with standard FPGA development kits. Note that the
TI-provided software GUI is only compatible with the TSWDC155EVM and third-party software development is
not supported.
8
ADS9227 Evaluation Module
Figure 2-6. Digital I/O
Copyright © 2024 Texas Instruments Incorporated
www.ti.com
Figure
SBAU439 – JANUARY 2024
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