Figure 6. Rate Selection And Option Switch; Table 2. Led Indicators - ADTRAN Total Reach TRDDB Installation And Maintenance Manual

Digital data bank channel unit
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Span Power
Span-powering is accomplished using -130 Vdc,
measured from Tip to Ring. Voltage measured from
Ring to GND should indicate 0 V. Voltage measured
from Tip to GND should indicate about -130 Vdc or
less depending on voltmeter impedance.
Synchronization and LED Indication
The TRDDB and TROCU-R typically require 30 to 90
seconds to achieve synchronization. Once
synchronized, the SYNC indicator LED will turn
Green. If synchronization cannot be achieved, check
the T/R pair for open- or short-circuit conditions or
load coils. Refer to Table 2 for LED indication.

Table 2. LED Indicators

L
E
D
N
O
S
X
O
N
n i
i d
c
r u
e r
t n
R
a e
h c
a
T
R
O
l F
s a
i h
g n
n o
t
e h
S
Y
N
C
G
e r
n e
t
a h
t t
e h
T
R
D
D
c
e h
k c
o
h t
r e
a
C
R
C
O
N
n i
i d
n o
t
e h
a
n b
r o
m
Q
M
D
S I
C
O
N
i
d n
i D
c s
n o
R
E
M
O
N
n i
i d
e r
m
o
e t
n i
i d
a c
e t
i l
k n
s i
o t
o t
g g
e r
m
o
e t
N
O
D
S
U
O
N
n i
i d
c
s u
o t
m
y b
t
e h
L
B
K
O
N
i
d n
o l
p o
a b
l F
s a
i h
g n
T
R
D
D
n i
t i
t a i
d e
4
D
e
c s
i r
t p
o i
n
a c
e t
t s
a h
t t
e h
e r
s i
o n
e s
p
e r
e s
t n
n o
t
e h
- 2
i w
e r
T
o l
p o
c ;
e h
k c
f
r o
o c
t n
n i
i u
y t
C
U
-
. R
f i
a
h s
r o
c t
r i
u c
t i
s i
p
e r
- 2
w
r i
l e
o o
. p
i
d n
c i
t a
s e
s
n y
, c
R
d e
i
d n
c i
e r
s i
o n
y s
c n
e b
w t
e
n e
t
e h
B
a
d n
t
e h
e r
m
o
e t
T
R
O
C
f
r o
o c
t n
n i
i u
, y t
o l
d a
o c
s l i
n b
r o
m
l a
i l
e n
o c
d n
i t i
n o
. s
a c
e t
t s
a h
t t
e h
e r
a
e r
r e
o r
- 2
i w
e r
a d
a t
r t s
a e
m
c ;
e h
k c
l a
i l
e n
o c
d n
i t i
n o
. s
c i
t a
s e
h t
t a
Q
u
i l a
y t
M
n o
e n
t c
h
s a
o
c c
r u
e r
. d
a c
e t
t s
a h
t t
e h
n u
t i
h
s a
e b
y l
r p
v o
s i
o i
e n
; d
l F
s a
i h
g n
t s
a h
t t
e h
e r
m
o
e t
c
n o
r t
l o
a
t c
v i
. e
P
u
h s
t
e h
A
P
u b
t t
e l
e b
w t
e
n e
m
n a
a u
a l
d n
r p
v o
i s i
n o
n i
. g
a c
e t
t s
e h
a
s b
n e
e c
o
t f
e h
r e
D
S
U
C /
S
U
s a
d
t e
r e
m
n i
T
R
O
C
U
-
. R
c i
t a
s e
D
S
, 0
O
C
, U
r o
C
S
k c
a
t c
v i
t a
o i
. n
i
d n
c i
t a
s e
o l
p o
a b
k c
a
t t
B
o t
w
a
d r
t s
e h
c
s u
o t
m
r e
y b
t
e h
T
R
O
C
U
-
. R
61291004L2-5, Issue 2
Options
Select the appropriate OPTIONS and RATE using
SW1 front panel switch as illustrated in Figure 6.

Figure 6. Rate Selection and Option Switch

False Loopback Immunity
ADTRAN's Protected Loopback family of channel
i l a
g n
units include an algorithm compatible with SARTS,
o
l a t
Hekimian, TPI, and other test systems that virtually
o t
eliminates false latching loopback occurrences. This
algorithm is always enabled at 64 kbps. In addition,
e s
t n
ADTRAN's Protected Loopback family features a
Protected Loopback mode for further false latching
t a
s e
loopback protection.
U
-
; R
Latching Loopback (SW1-1)
a ,
d n
During operation up to 56 kbps with LLB enabled
(SW1-1 ON), the TRDDB will respond to the legacy
DS0 latching loopback sequences and translates OCU
s r
and CSU latching loopback sequences to the OCU-R
f
r o
per TR62310 and ANSI T1.417. With LLB OFF, the
TRDDB will not respond to latching loopback.
t i
r o
At 64 kbps the function of the LLB switch is altered.
When 64 kbps is enabled, placing LLB to ON will
n e
permit the TRDDB to respond to the legacy latching
loopback sequence per TR62310 and ANSI T1.417.
At 64 kbps, with LLB OFF, the TRDDB will enable
n o
ADTRAN's Protected Loopback mode.
Protected Loopback
ADTRAN's Protected Loopback supports the DDS
d e
latching loopback standard in T1E1.2/99-007R1.
When enabled, the TRDDB will respond to latching
loopback when the idle code preamble is sent prior to
U
the latching loopback sequence specified in TR62310
and ANSI T1.417. See Table 3 for the latching
e h
loopback sequence requirement when Protected
Loopback is enabled.
ON
SC
64
56
19.2
9.6
4.8
2.4
QM
SW1
LLB
61291004L2-5B

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