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4.12
TG/VDR SCHEMATIC DIAGRAM
5
0 1 MAIN(TG/VDR)
4
CCD_VL
CCD_VHH
TO
MAIN IF
CN102
V2
V4
V1
V3
SUB
RG
H1
3
H2
L5001
NQR0129-002X
REG_4.8V
TO
MAIN IF
CN109
C5001
C5002
1
0.1
GND
IC5003
MM1385EN-X
2
NOTE : The parts with marked ( ) is not used.
1
A
B
C5023
0.1
VDD3
D5001
SGMOD
1SS355-X
VM
V2
V4
CXD3602R
V1
C5024
R5001
VH
∗
100k
[TG/V_DRIVER]
V3
SUB
C5025
1
/35
VL
C5026
∗
DSGAT
VDD4
C5027
0.1
T
T
C5028
10
/6.3
C5004
1
C5003
10
/6.3
∗
C
NOTES :
For the destination of each signal and further line connections that are cut off from
this diagram , refer to "4.1 BOARD INTERCONNECTIONS".
When ordering parts , be sure to order according to the Part Number indicated in the Parts List.
C5014
0.1
VDD2
C5015
NC
∗
TEST2
XPBLK
IC5001
XCLPDM
GND(CDS)
R5003
22
XSHD
R5002
10
XSHP
C5013
AVD(CDS)
0.1
XCLPOB
C5012
AVD(H)
0.1
H2
R5020
10
L5002
L5003
10µ
NQR0129-002X
R5006
10
T
R5010
10
C5008
47
C5009
/6.3
10
/6.3
R5009
10
C5005
C5006
0.1
0.1
C5007
∗
D
E
4-25
4-26
L5004
L5005
10µ
NQR0129-002X
L5006
L5007
10µ
NQR0129-002X
T
T
C5018
C5022
T
T
C5017
∗
C5021
∗
47
/10
C5019
4.7
/25
∗
C5016
C5020
∗
∗
IC5002
IC5004
∗
W194-70G-X
FBI
OUT2
/INH
/XT
IN
VDD
XT
VDD
R5017
220
T
GND
OUT1
VSS
QO
R5021
R5022
FS0
FS1
∗
∗
y20148001a_rev0.1
F
TG_RST
TO
CLK_OUT
SYSCON-CPU
DATA_OUT
TG_CS
HDIN
TO DSP
VDIN
TO
CCD_-7.5
MAIN IF
REG_15V
CN109
TO DSP,
CDS/AD
PBLK
TO CDS/AD
SHD
SHP
TO DSP, CDS/AD
CPOB
TO CDS/AD
CCD_3.1V
[from_CDS_REG]
CLK9A
TO DSP
TG_36M
TO CDS/AD
ADCLK
G
H
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