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PD3381A (DVDM ASSY : IC601)
• System Control CPU
•
Block Diagram
69
RES
79
WDTOVF
78
MD2
82
MD1
81
MD0
80
NMI
76
CK
71
EXTAL
73
XTAL
74
Vpp
77
Vcc
15
Vcc
43
Vcc
70
Vcc
75
Vcc
83
Vcc
84
Vcc
99
Vss
3
Vss
12
Vss
22
Vss
31
Vss
40
Vss
52
Vss
61
Vss
72
Vss
96
Vss
106
AVref
86
AVcc
85
AVss
91
Periphery address bus(24 bit)
Periphery data bus(16 bit)
Internal address bus(24 bit)
Internal upper data(16 bit)
Internal lower data(16 bit)
68
67
66 65 64 63 62 60 59 58 57 56 55 54 53
PORT A
64k PROM / MASK ROM
CPU
INTERRUPT
USER BREAK
CONTROLLER
CONTROLLER
SERIAL
COMMUNICATION
INTERFACE
(×2CHANNEL)
PROGRAMABLE
TIMING
PATTERN
CONTROLLER
PORT C
95 94 93 92 90 89 88 87
2
51 50 49 48 47 46 45 44 42 41
ADDRESS
4kB RAM1
DIRECT
MEMORY
ACCESS
CONTROLLER
BUS STATE
CONTROLLER
16BIT
INTEGRATED
TIMER PULSE UNIT
A/D
WATCHDOG
CONVERTER
TIMER
PORT B
1
112
111
110
109
108
107
105
104
103
102
DV-505, DVL-909, DV-S9
A15
39
A14
38
A13
37
A12
36
A11
35
A10
34
A9
33
A8
32
A7
30
A6
29
A5
28
A4
27
A3
26
A2
25
A1
24
A0(HBS)
23
AD15
21
AD14
20
AD13
19
AD12
18
AD11
17
AD10
16
AD9
14
AD8
13
AD7
11
AD6
10
AD5
9
AD4
8
AD3
7
AD2
6
AD1
5
AD0
4
101
100
98 97
35
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