Advanced Chipset Features - Acer Veriton 7200 Service Manual

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Parameter
APIC Mode
MPS Version Control For OS

Advanced Chipset Features

Selecting "Advanced BIOS Features" from the Advanced Options menu displays the following screen.
The following table describes the parameters found in the sub-menu. Settings in boldface are the default and
suggested settings
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Parameter
DRAM Timing Selectable
CAS Latency Time
Active to Precharge Delay
DRAM RAS #to CAS# Delay
DRAM RAS# Precharge
DRAM Data Integrity Mode
System BIOS Cacheable
Video BIOS Cacheable
Video RAM Cacheable
Delayed Transaction
Delay Prior to Thermal
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Description
Advanced Interrupt Controller. The I/O APIC handles
interrupts very differently than the 8259. (Refer to ICH2
EDS Rev 1.0 P6-39, 6.8)
Multi CPU for NT. system
Description
SDRAM Timing
The default setting by your DRAM's SPD.
The default setting by your DRAM's SPD.
The default setting by your DRAM's SPD.
The default setting by your DRAM's SPD.
The default setting by your DRAM's SPD.
E.F segment shadow RAM cacheable.
C segment shadow RAM cacheable.
A.B segment shadow RAM cacheable.
ICH2 enables delayed transactions for internal
register, FWH, and LPC I/F accesses.
Enables Pentium 4 thermal function - 16 miuntes
after POST.(only for ACPI OS)
Options
Enabled
Disabled
1.4/ 1.1
Option
1.5/2/2.5/3
7/6/5
3/2
3/2
Non-ECC/ECCl
Enabled/Disabled
Enabled/Disabled
Enabled/Disabled
Enabled/Disabled
16/4/8/32 minutes
Chapter 2