Table of Contents
Advertisement
4.11
CAM.DSP SCHEMATIC DIAGRAM
0 1 MAIN (CAM.DSP)
TO TG
PBLK
TL4405
AD_CLK
CLK27
CLK18
CLK13
ID
XAVD
XAHD
VGAT
5
OBCLP
SHD
SHP
TL4201
C4205
C4204
0.1
0.1
TO CCD
CN5201
CN107
CCD_OUT
AVSS
NC
R4203
0 Ω
AVSS
D9
C4208
0.1
AVDD
TIMING
D8
C4209
1
BLKSH
GEN
D7
BLKFB
D6
CDS
4
10bit
TL4202
C4206
1
CDSIN
D5
ADC
C4210
BLKC
D4
0.1
R4205
33K
BIAS
D3
C4211
PGA
0.1
AVDD
I/F
D2
NC
D1
AVSS
D0
ADCIN
NC
C4212
0.1
C4201
100
C4213
0.1
1
C4214
C4217
[CDS/AGC/AD]
C4215
0.1
1
IC4201
HD49334F
C4203
TO SYSCON
CDS_CS
CLK_OUT
DATA_OUT
IC4202
[3V_REG.]
CRWSEL
MM1385HN-X
CDSTB
CALE
BUS15
C4202
3
BUS14
0.1
BUS13
BUS12
BUS11
BUS10
BUS9
BUS8
BUS7
BUS6
BUS5
BUS4
BUS3
BUS2
BUS1
BUS0
DSP_RST
MVD
OMT
MFLD
VC0
VC1
VC2
BLKA
BLKC
VC3
2
BLKB
DOT_CLK
OSD_VD
OSD_HD
TO DECKCPU
OP DRV
CAM_VD
CLK4M5
TO OP DRV
IRIS_PWM
# Difference Point
TO DVMAIN
TDB
(N.C)
1
TDA
NTSC
TMS
TO MAIN IF
PAL
TCMK
CN105
TRST
∗
NOTE : The parts with marked ( ) is not used.
A
B
TL4301
C4342
C4341
0.1
0.1
C4343
VDDI
0.1
VSS
MEMORY_IN
MEMORY_OUT
C4344
ADDVDDE
0.1
CLK27
CLK18
CLK13
CLK
ID
EIS
GEN
VDTG
HDTG
FMC
LHFO
&SSG
C4345
ADDVDDE
0.1
VSS
ADIN9
ADIN8
ADIN7
ADIN6
KIZU
ADIN5
ADIN4
ADIN3
ADIN2
ADIN1
ADIN0
C4346
VDDI
0.1
ADDVSS
C4347
ADDVDDE
0.1
PBLK
R4339
0 Ω
RE/RW
WE/DSTB
R4340
0 Ω
ALE/ASTB
/4
BUS15
BUS14
IWD
BUS13
BUS12
BUS11
1
BUS10
BUS9
BUS8
BUS7
BUS6
CPU
BUS5
BUS4
BUS3
I/F
BUS2
BUS1
BUS0
TL4304
VSS
CLR
VDCPU
TL4306
HDCPU
TL4305
FRP
TL4307
OMT
CONTROL
AFBEND
TL4308
TL4309
FLDCPU
BEND
TL4310
TL4311
VSS
GT_X
TL4312
VPD
OSD
CS
TL4313
GT_S
C4348
I/F
VDDI
0.1
ANA
CLKOSD
IC4301
HDOSD
I/F
VDOSD
JCY0150
BLK1
R4341
BLK2
0 Ω
[CAMERA_DSP]
VC1
VC2
VR
VG
VB
ANALOG_IN
VBLK
ADDVSS
RA4307
#
NRZ0034-100W
NRZ0034-100W
C4301
0.1
R4303
R4304
∗
0Ω
∗
0Ω
# Exchange Parts List
RA4307~RA4310
R4302
With DSC MODEL
10
22
∗
∗
Without DSC MODEL
C
NOTES :
For the destination of each signal and further line connections that are cut off from
this diagram , refer to "4.1 BOARD INTERCONNECTIONS".
When ordering parts , be sure to order according to the Part Number indicated in the Parts List.
C4340
C4338
C4337
0.1
0.1
0.1
DVC_IN
DVC_OUT
ADDVDDE
DVC
HDCVF
VDCVF
I/F
ADDVDDE
ADDVSS
ADDVDDE
CVF
ADDVDDE
ADDVSS
ADDVDDE
EOUT12
EOUT11
EOUT10
ENC
SELECT
EOUT9
SENC
EOUT8
EOUT7
EOUT6
EOUT5
EOUT4
EOUT3
EOUT2
EOUT1
EVR
AVDDE1
DAC
VREFH1
VREFL1
Y/C
AVSSE1
HNR
AVDDE2
VREFH2
VREFL2
AVSSE2
DVDDM
AVDDE3
VREFH3
VREFL3
AUTO
AVSSE3
Y
AVDDV1
DAC
AVSSV1
C
Y2_OUT
Y_OUT
DAC
VREFY
GY
DAC
C_OUT
VREFC
RY
DAC
R-Y_OUT
B-Y_OUT
BY
VREFVF
DAC
IREFVF
DSC
K_OUT
VREFLK
K
VREFHK
I/F
AVSSV2
KASHA
DAC
AVDDV2
DVDDM
AVDDA
DACTEST
DSC_OUT
DSC_IN
ADDVSS
RA4308
RA4309
RA4310
#
#
#
NRZ0034-100W
NRZ0034-100W
C4303
C4304
0.1
0.1
NQR0129-002X
C4305
10
/6.3
T
D
E
4-23
4-24
IC4302
TMS4C2973-28-X
[FILED_MEMORY]
[FILED_MEMORY]
[FILED_MEMORY]
[FILED_MEMORY]
RA4301
100
NC
VSS2
NRZ0034-101W
VSS1
Q11/COUT3
D11/CIN3
Q10/COUT2
D10/CIN2
Q9/COUT1
D9/CIN1
Q8/COUT0
D8/CIN0
Q7/YOUT7
D7/YIN7
Q6/YOUT6
D6/YIN6
Q5/YOUT5
D5/YIN5
Q4/YOUT4
VDDI
D4/YIN4
Q3/YOUT3
VSS
D3/YIN3
Q2/YOUT2
C4335
D2/YIN2
Q1/YOUT1
0.1
GT_B
D1/YIN1
Q0/YOUT0
TL4303
GT_A
D0/YIN0
SRCK/MCLK
R4337
RA4303
100
TL4302
HRP2
SWCK/MCLK
RSTR/RAD
NRZ0034-101W
0 Ω
HRP1
RSTW/WAD
RE/FMRE
WE/FMWE
OE/RAE
IE/IE
VCC2
VCC1
NC
VSS
VDDE
VSS
C4333
VDDE
0.1
0.1
C4334
VSS
C4332
C4331
0.1
10
/6.3
TL4317
TL4316
C4329
0.1
NC
C4328
R4336
0 Ω
0.1
R4334
∗
C4327
0.1
R4335
∗
C4324
10
/6.3
R4333
L4307
0 Ω
10µ
C4323
T
0.1
C4326
C4325
∗
0.1
NC
C4321
0.1
R4313
R4344
IREFY
0 Ω
2.7k
C4320
0.1
R4312
R4343
IREFC
0 Ω
2.7k
C4319
0.1
R4314
R4311
12k
2.7k
R4315
10k
R4318
R4321
R4320
C4318
1.5k
1.5k
100
0.1
R4329
R4342
0 Ω
∗
R4317
75
C4350
0.1
AVSSA
Q4301
R4328
UMT2N-W
0 Ω
R4324
R4327
1.5k
1.5k
R4316
R4319
75
62
VSS
∗
R4323
R4326
0 Ω
120
VDDI
T
R4322
R4325
∗
120
C4316
C4317
∗
Q4302
0.1
UMT2N-W
R4332
∗
R4330
∗
R4345
∗
Q4303
TL4314
C4322
R4331
∗
∗
L4304
22µ
T
C4313
C4312
22
/6.3
0.1
L4306
NQR0129-002X
L4301
C4310
C4309
10
/6.3
0.1
VOUT
C4306
NOISE
0.1
C4308
0.1
GND
C4307
T
VIN
10
/6.3
CONT
C4311
1
IC4304
L4302
NQR0129-002X
∗
[2.5V_REG.]
F
TO MAIN IF
CN101
HRP
HDCVF
VDCVF
TO DVMAIN
OUTH
OUTV
DYI3
DYI2
DYI1
DYI0
DCI3
DCI2
DCI1
TO SYSCON
DCI0
DVMAIN
INH
INV
DYO3
DYO2
DYO1
TO
DYO0
DVMAIN
DCO3
DCO2
DCO1
DCO0
L4305
NQR0129-002X
T
TO OP DRV
H_OFFSET
H_GAIN
DUMP_CTL
TO PRE/REC
NOSIG_LV
FSPLLCTL
TO DVMAIN
M_VCOCTL
ATF_GAIN
TO PRE/REC
PBVCOCTL
TO DVMAIN
PBPLLCTL
RECCADJ
TO PRE/REC
TO AUDIO
S_SHUT
TO V OUT
DV_Y
DV_C
TO REG
REG_2.5V
R4346
0 Ω
LCD_Y
TO MAIN IF
LCD_R
CN101
LCD_B
LCD_G
DSCIO7
DSCIO6
DSCIO5
DSCIO4
DSCIO3
DSCIO2
DSCIO1
DSCIO0
DSYIO7
DSYIO6
DSYIO5
DSYIO4
DSYIO3
DSYIO2
DSYIO1
DSYIO0
FLDDSC
(N.C)
VDDSC
HDDSC
CLKDSC
DSCO7
DSCO6
DSCO5
DSCO4
DSCO3
DSCO2
DSCO1
DSCO0
DSYO7
DSYO6
DSYO5
DSYO4
DSYO3
DSYO2
DSYO1
DSYO0
TO REG
REG_1.8V
REG_3V
GND
L4201
REG_4.8V
NQR0129-002X
y10254001a_rev0.0
G
H
Advertisement
Table of Contents
