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4.8
DVMAIN SCHEMATIC DIAGRAM
0
1
MAIN (DVMAIN)
TO MAIN IF
CN105
TDO
TMS
TCMK
TRST
TO
R3059
100
TDB
CAM.DSP
5
TO REG
L3002
DIGITAL_3V
REG_3V
NQR0129-002X
REG_2.5V
REG_1.8V
C3003
NCB30JK-105X
1
GND
L3003
DIGITAL_2.5V
OPEN
C3004
OPEN
L3005
DIGITAL_1.8V
NQR0006-001X
C3007
NCB10JK-106X
10
4
L3004
ANALOG_2.5V
NQR0006-001X
C3005
10
/6.3
T
L3006
ANALOG_1.8V
OPEN
C3008
10
/6.3
T
L3001
D3004
MA2Z720-X
PHY_2.85V
NQR0129-002X
C3001
10
/6.3
T
3
L3012
NQR0129-002X
R3025
1K
Q3001
2SC4617/R5/-X
C3009
1
C3006
R3026
∗
1
2
TO PRE/REC
AGC_OUT
VRB_AGC
VREF_1.1
REC_DATA
REC_CLK
REC_CTL
REF_CLK
ATFI
VRB_ATF
L3015
NQR0006-001X
R3046
R3045
C3056
∗
T
1
R3070
∗
∗
NOTE : The parts with marked ( ) is not used.
A
B
C3041
C3040
∗
∗
N.C
N.C
∗
C3047
MON0
MON1
VDDE
VDDI
MON2
MON3
MON4
MON5
VSS
MON6
MON7
MON8
MON9
MON10
C3042
0.01
MON11
MON12
C3043
VDDE
VDDI
0.01
MON13
MON14
MON15
MON16
MON17
MON18
MON19
VSS
MON20
MON21
MON22
MON23
VDDE
MON24
MON25
MON26
MON27
VDDE
C3044
0.1
N.C
VDDP
VSSP
VDDA
VSS
N.C
N.C
VDDE
VSS
VSS
VDDE
VDDI
VSS
VDDE
VDDE
VDDI
VSS
VSS
MTEST
C3045
0.1
PHYAVD2
BUSRST
RA3004
10k
PHYAVS2
PMODE
PWR3
PWR1
PWR2
VDDI
PHYAVS1
PHYAVD3
C3046
0.01
PHYAVD1
VSS
VDDE
A/D
VCO
D/A
D/A
VDDI
VSS
R3071
0Ω
C3011
0.1
TL3005
R3050
∗
∗
R3073
∗
R3003
C3014
Q3002
∗
C3054
∗
∗
∗
R3040
R3049
∗
R3074
∗
IC3004
∗
Q3002
10K
VCO
2SC4617/QR/-X
R3043
∗
∗
IC3007
R3041
R3044
∗
∗
∗
R3072
C3067
∗
1000P
C3052
∗
C
NOTES :
For the destination of each signal and further line connections that are cut off from
this diagram , refer to "4.1 BOARD INTERCONNECTIONS".
When ordering parts , be sure to order according to the Part Number indicated in the Parts List.
CPUBUSTYPE
CPUDSLOGIC
CPUWAITLOGIC
IC3001
JCY0152
[DVMAIN]
VCO
A/D
L3007
2.2µ
CH
R3009
10k
R3010
10k
TL3001
∗
R3075
∗
R3047
X3001
∗
R3048
∗
R3068
270
[41.85M]
C3068
NAX0169-001X
∗
CH
CH
C3057
∗
C3069
C3058
0.1
∗
D
E
4-17
4-18
CPUWAIT
XINT
XCPUCS
XCPURW
XCPUDSTB1
XCPUDSTB0
CPUALE
INV
INH
OUTV
OUTH
BRSI3
BRSI2
BRSI1
BRSI0
YSI3
YSI2
YSI1
YSI0
BRSO3
BRSO2
BRSO1
BRSO0
YSO3
YSO2
YSO1
YSO0
AODAT0
AODAT1
VSS
AOBCK
AOLRCK
DODAT
C3038
0.1
VDDI
DOBCK
DOLRCK
AIDAT0
AIDAT1
AIMCK
AIBCK
AILRCK
DIDAT
R3034
DIMCK
C3037
8P
2.2k
DIBCK
X3002
DILRCK
[NAX0480-001X]
OSC11O
OSC11I
C3036
8P
∗
OSC24O
R3033
OSC24I
VCXO12O
VCXO12I
VCXO11O
L3008
L3009
∗
VCXO11I
12µ
C3031
0.1
VDDP
C3030
0.1
CH
CH
VCIAUD
C3032
C3033
C3034
C3035
∗
∗
0.001
8P
VSSP
VDDE
PWMAUDIO
R3027
VSS
10k
VDDE
N.C
C3049
2200P
LPFIN
R3029
6.8K
LPFOUT
R3036
R3037
C3048
VDDE
10K
680
0.047
PHYAVS3
PHYVSR
C3029
PHYVSA
0.01
PHYVDR
PHYVDA
C3050
0.01
CH
F
INV
TO CAM.DSP
INH
R3005
10
TO DECKCPU,
OUTV
R3006
10
CAM.DSP
OUTH
DCO3
DCO2
DCO1
DCO0
DYO3
DYO2
TO
DYO1
CAM.DSP
DYO0
DCI3
RA3001
DCI2
10
DCI1
DCI0
DYI3
RA3002
DYI2
10
DYI1
DYI0
CLK27
TO TG
TO AUDIO
RA3003
AODAT
AIDAT
AIMCK
AIBCK
AILRCK
10
TO
DECKCPU
ADDT15
ADDT14
ADDT13
ADDT12
ADDT11
ADDT10
ADDT09
ADDT08
ADDT07
ADDT06
ADDT05
ADDT04
ADDT03
ADDT02
ADDT01
ADDT00
DV_WAIT
DRWSEL
DRE
DWE
DALE
DV_RST
CLK27SEL
SRV_TRK
TSR
FRP
SPA
HID1
TL3006
SBE
TO MAIN IF
CN105
FS_PLL
MAIN_VCO
PB_CLK
DISCRI
TO MAIN IF
RA3005
0Ω
NRZ0040-0R0X
CN103
TPA+
TPA-
TPB+
TPB-
TO
CAM.DSP
FSPLLCTL
M_VCOCTL
PBVCOCTL
PBPLLCTL
y10253001a_rev0.0
G
H
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