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LC72136N (IC2) : PLL Frequency synthesizer
1.Terminal layout
XTI
1
FM
2
CE
3
DI
4
CLOCK
5
DO
6
VCOSTOP
7
AM/FM
8
LW
9
MW
10
SDIN
11
2. Block diagram
1
22
16
1/2
15
3
4
C
B
2
I/F
5
6
Power
on
17
Reset
21
3. Pin function
Pin
Symbol
I/O
No.
X'tal oscillator connect (75KHz)
XTI
I
1
LOW:FM mode
FM
O
2
When data output/input for 4pin(input) and
CE
I
3
6pin(output): H
Input for receive the serial data from
I
DI
4
controller
Sync signal input use
I
5
CLOCK
Data output for Controller
DO
O
6
Output port
"Low": MW mode
VCOSTOP
O
7
Open state after the power on reset
AM/FM
O
8
Input/output port
-
9
NC
Input/output port
-
10
NC
Data input/output
I/O
11
SDIN
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XT
22
GND
21
LPFI
20
LPFO
19
PD
18
VCC
17
FMIN
16
AMIN
15
NC
14
IFCNT
13
IFIN
12
Reference
Driver
Charge Pump
Swallow Counter
Swallow Counter
1/16,1/17 4bit
1/16,1/17 4bit
12bit
Programmable
DriverS
Data Shift Register & Latch
7
8
2
11 13
Function
Phase
Detector
18
19
20
Unlock
Detector
12
Universal
Counter
Pin
Symbol
I/O
No.
IF counter signal input
12
IFIN
I
IF signal output
13
IFCNT
O
Not use
14
NC
-
AM Local OSC signal output
I
15
AMIN
FM Local OSC signal input
FMIN
I
16
Power supply(VDD=4.5
VCC
-
17
When power ON:Reset circuit move
PLL charge pump output(H: Local OSC
18
PD
O
frequency Height than Reference frequency.
L: Low Agreement: Height impedance)
Output for active lowpassfilter of PLL
19
LPFO
O
Input for active lowpassfilter of PLL
LPFI
I
20
Connected to GND
GND
-
21
X'tal oscillator(75KHz)
XT
I
22
Function
5.5V)
1-25
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