Charging; Power Up And Reset - Nokia NPL-4 Series Manual

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When SLEEPX signal (low) is detected UEMEK enters SLEEP mode. VCORE, VIO and
VFLASH1 regulators are put into low quiescent current mode. All the RF regulators are
disabled in SLEEP. When SLEEPX=1 detected UEMEK enters ACTIVE mode and all func-
tions are activated.
The sleep mode is exited either by the expiration of a sleep clock counter in the UEMEK
or by some external interrupt, generated by a charger connection, key press, headset
connection etc.
In sleep mode VCTCXO is shut down and 32 kHz sleep clock oscillator is used as reference
clock for the baseband.

Charging

Charging can be performed in parallel with any operating mode. In NPL-4/5 the battery
type/size is indicated by a 75kOhm BSI-resistor, which is in battery back. The resistor
value corresponds to a specific battery capacity. NTC resistor, which is measuring battery
temperature is located on an engine board.
The battery voltage, temperature, size and current are measured by the UEMEK con-
trolled by the charging software running in the UPP.
The charging control circuitry (CHACON) inside the UEMEK controls the charging current
delivered from the charger to the battery. The battery voltage rise is limited by turning
the UEMEK switch off when the battery voltage has reached 4.2 V. Charging current is
monitored by measuring the voltage drop across a 220 mOhm. resistor.

Power up and reset

Power up and reset is controlled by the UEMEK ASIC. NPL-4/5 baseband can be powered
up in following ways:
1 Press power button which means grounding the PWRONX pin on UEMEK
2 Connect the charger to the charger input
3 Supply battery voltage to the battery pin.
4 RTC Alarm, the RTC has been programmed to give an alarm
After receiving one of the above signals, the UEMEK counts a 20ms delay and then enters
its reset mode. The watchdog starts up, and if the battery voltage is greater than Vcoff+
a 200ms delay is started tp allow references etc. to settle. After this delay elapses the
VFLASH1 regulator is enabled. 500us later VR3, VANA, VIO and VCORE are enabled.
Finally the PURX line is held low for 20 ms. This reset, PURX, is fed to the baseband ASIC
UPP, resets are generated for the DSP and the MCU. During this reset phase the UEMEK
forces the VCXO regulator on regardless of the status of the sleep control input signal to
the UEMEK. The sleep signal from the ASIC is used to reset the flash during power up and
to put the flash in power down during sleep. All baseband regulators are switched on at
the UEMEK power on except for the SIM regulator that is controlled by the MCU. The
Copyright © 2005 Nokia Corporation. All rights reserved.
Issue 2 05/05
System Module and User Interface
NPL-4/5/
Page 33