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Hardware
Table 1
and
Table 2
Pin Number
1
3
5
7
9
11
13
15
17
19
Pin Number
1
3
5
7
9
11
13
15
17
19
•
PGOOD – This signal indicates the state of the onboard VIO supply for the AWR device coming from
the onboard PMIC. A high on the PGOOD signal (3.3 V) indicates that the supply is stable. Because
the IOs are not failsafe, the MCU must ensure that it does not drive any IO signals to the AWR device
before this IO supply is stable. Otherwise, there could be leakage current into the IOs.
•
PMIC Enable – This signal goes onboard PMIC enable. The MCU can use this signal to completely
shut down the PMIC and AWR device to save power. The power up of the PMIC takes approximately 5
ms once the Enable signal is released.
NOTE: To enable this feature, the R102 resister must be populated on the EVM.
•
ANA1/2/3/4 – These are inputs to the GPADCs (general purpose ADC) available on the AWR1443
device.
10
AWR1443BOOST, AWR1243BOOST Evaluation Module mmWave Sensing
Solution
provide the connector-pin information.
Table 1. 20-Pin Connector Definition (J5)
Description
NERROUT
NERRIN
MCUCLK OUT
NC
MSS LOGGER
WARMRST
BSS LOGGER
SOP2
SOP1
SOP0
Table 2. 20-Pin Connector Definition (J6)
Description
5 V
GND
ANA1
ANA2
ANA3
ANA4
PGOOD (onboard VIO)
PMIC Enable
SYNC_OUT
PMIC CLK OUT
Copyright © 2017, Texas Instruments Incorporated
Pin Number
2
GND
4
NC
6
SPI_CS
8
GPIO1
10
nRESET
12
SPI_MOSI
14
SPI_MISO
16
HOSTINT
18
GPIO2
20
NC
Pin Number
2
3V3
4
GND
RS232TX (Tx from IWR
6
device)
8
RS232RX (Rx into IWR device)
10
SYNC_IN
12
NC
14
SPI_CLK
16
GPIO0
18
SCL
20
SDA
SWRU507A – May 2017 – Revised May 2017
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