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IC
MC14011BF (MOTOROLA)FLAT PACKAGE
MC14011BFEL
C-MOS 2-INPUT NAND GATE
-TOP VIEW-
14
13
12
11
10
9
V
DD
(+ 3 to + 18V )
1
2
3
4
5
6
MC14018BFEL (MOTOROLA)FLAT PACKAGE
C-MOS PRESETTABLE DIVIDE-BY-N COUNTER
— TOP VIEW —
FB
1
(FEEDBACK) IN
V
DD
A
2
IN
(+3 V to +12 V)
B
3
IN
Q
4
B OUT
Q
5
A OUT
Q
6
C OUT
C
7
IN
8
GND
DIVIDE
CONNECT TO FB
VIA
BY
INPUT
10
Q
DIRECT
E
9
Q
Q
AND GATE
D,
E
8
Q
DIRECT
D
7
Q
Q
AND GATE
C,
D
6
Q
DIRECT
C
5
Q
Q
AND GATE
B,
C
4
Q
DIRECT
B
3
Q
Q
AND GATE
A,
B
2
DIRECT
Q
A
MC14053BF (MOTOROLA)FLAT PACKAGE
MC14053BFEL
C-MOS TRIPLE 2-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS
— TOP VIEW —
V
DD
X1
1
16
IN/OUT
(+3 V to +18 V)
X0
2
15
XC
IN/OUT
Y1
3
14
ZC
IN/OUT
YC
4
13
Z1
IN/OUT
Y0
5
12
Z0
IN/OUT
EN
6
11
AZ
IN
7
V
*
10
AX
EE
8
GND
9
AY
V
* ; V
– V
+ 3 V + 18 V
EE
DD
EE
4-12
A
A
8
=
Y
Y
B
B
Y = A • B = A + B
A
B
Y
0
0
1
0
1
1
1
0
1
GND
0
; LOW LEVEL
1
1
0
7
1
; HIGH LEVEL
14
16
1
FB
10
PE
15
RD
(RESET DIRECT) IN
2
5
A
Q
A
3
4
B
Q
B
14
CK
(CLOCK) IN
7
6
C
Q
C
9
11
D
Q
D
13
Q
E OUT
12
13
E
Q
E
R
D
12
E
15
IN
11
Q
D OUT
10
PE
(PRESET ENABLE) IN
9
D
IN
RESULTS FROM EACH Q OUTPUT
5 COUNTS HIGH, 5 COUNTS LOW
5 COUNTS HIGH, 4 COUNTS LOW
4 COUNTS HIGH, 4 COUNTS LOW
4 COUNTS HIGH, 3 COUNTS LOW
3 COUNTS HIGH, 3 COUNTS LOW
3 COUNTS HIGH, 2 COUNTS LOW
2 COUNTS HIGH, 2 COUNTS LOW
2 COUNTS HIGH, 1 COUNTS LOW
1 COUNTS HIGH, 1 COUNTS LOW
2
X0
1
X1
XC
15
OPEN
10 AX
IN/OUT
5
Y0
IN/OUT
3
Y1
YC
4
OPEN
IN/OUT
9
AY
IN/OUT
12 Z0
13 Z1
ZC
14
OPEN
IN/OUT
11 AZ
EN
V
EE
IN/OUT
6
7
IN/OUT
CONT. INPUTS
ON
CHANNEL
EN
A (X, Y, Z)
0
0
0
0
;
LOW LEVEL
0
1
1
1
;
HIGH LEVEL
1
X
OPEN
X
;
DON'T CARE
MC14020BFEL (MOTOROLA)FLAT PACKAGE
C-MOS 14-STAG RIPPLE-CARRY BINARY COUNTER/DRIVER
—TOP VIEW—
*
Q11
1
16
OUT
V
DD
Q12
OUT
2
15
Q10
OUT
Q13
3
14
Q9
OUT
OUT
Q5
4
13
Q7
OUT
OUT
Q4
OUT
5
12
Q8
OUT
Q6
OUT
6
11
R
D
IN
Q3
7
10
CK
OUT
IN
9
8
GND
Q0
OUT
BINARY OUTPUTS
COUNT
Q13
Q12
Q11
Q10
Q9
Q8
0
0000
0
0
0
0
0
0
1
0001
0
0
0
0
0
0
2
0002
0
0
0
0
0
0
3
0003
0
0
0
0
0
0
4
0004
0
0
0
0
0
0
16380
4FFC
1
1
1
1
1
1
16381
4FFD
1
1
1
1
1
1
16382
4FFE
1
1
1
1
1
1
16383
4FFF
1
1
1
1
1
1
IN HEXADECIMAL
IN DECIMAL
Q0
H
9
H
H
J
Q
J
Q
J
Q
10
CK
K R
K
R
K
R
D
D
D
H
H
H
11
R
D
MC14046BF (MOTOROLA)FLAT PACKAGE
C-MOS PHASE LOCKED LOOP
-TOP VIEW-
PCP
1
( PHASE COMPARATOR ) OUT
PC
1 ( PHASE COMPARATOR ) OUT
2
PC
B ( PHASE COMPARATOR ) IN
3
VCO
4
( VOLTAGE CONTROLLED OSC ) OUT
INH
( INHIBIT ) IN
5
C1
A
6
C1
B
7
8
GND
PHASE
SELF
2
14
COMPARATOR 1
PCA
BIAS
CIRCUIT
13
PHASE
3
1
COMPARATOR 2
PCB
4
9
11
VCO
12
VCO
6
7
SOURCE
10
5
FOLLOWER
INH
15
GND
*1
TYPE
V
DD
CD4046BE
HD14046BP
+ 3 to + 8V
MC14046BCP
MC14046BF
TC4046BP
CD74HC4046AM
+ 2 to + 6V
MC74HC4046AF
MC74HC4046AN
9
Q0
7
Q3
5
Q4
4
Q5
6
Q6
13
Q7
12
10
Q8
14
Q9
15
Q10
1
Q11
2
Q12
3
Q13
R
D
11
*
TYPE
V
DD
+2 to +6V
HC4020
14020, 4020, 84020
+3 to +18V
Q7
Q6
Q5
Q4
Q3
Q0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
1
1
1
1
1
0
RD
Q13-Q0
1
1
1
1
1
1
ALL LOW
1
1
1
1
1
1
0
0
COUNT
1
1
1
1
1
1
0 ; LOW LEVEL
1 ; HIGH LEVEL
Q3
Q12
H
7
H
2
H
3
Q13
J
Q
J
Q
J
Q
K
R
K
K
R
D
D
H
H
H
*
1
V
16
DD
15
Z
D ( ZENER ) OUT
14
PC
A ( PHASE COMPARATOR ) IN
13
PC
2 ( PHASE COMPARATOR ) OUT
R
2
12
R
1
11
10
SF
( SOURCE FOLLOWER ) OUT
9
VCO
( VOLTAGE CONTROLLED OSC ) IN
14
2
PC1
PCA
PC1
13
PC2
3
1
PCB
PCP
PC2
PCP
9
4
VCO
VCO
IN
OUT
11
6
R1
C1A
VCO
12
7
R2
C1B
R1
10
SF
R2
5
15
C1A
INH
ZD
C1B
SF
ZD
CA-755/755P
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