Schematic Diagram - Main Board (5/7) - Sony DSX-GS900 Service Manual

2019/10/17 22:00:30 (GMT+09:00)
DSX-GS900

5-12. SCHEMATIC DIAGRAM - MAIN Board (5/7) -

1 2
MAIN BOARD (5/7)
A
R1002
0
1
4.9
B
VIN
2
GND
3.3 3
STBY
C1016 C1004 R1003
10 1 100k
JL1114
C1005
47
C
D
E
R1007
0
JL1002
BT_CLK R1004 100
BT_SYNC R1005 100
CL1000
BT_DOUT R1035 0
CL1001
BT_DIN R1006 100
F JL1003
JL1004
JL1005
JL1006
G
BT1
BT ANTENNA
PATTERN
H ANTENNA
CN1002
3
2
1
I
37
• See page 44 for IC Block Diagrams.
3 4 5
IC1001
+3.3V REGULATOR
IC1001
BU33TD3WG-TR
JL1007
5 3.2
VOUT
4
NC
R1055
0
R1013 R1024 R1025 C1029
0 100k 100 0.1
21 10
22 9
SPI_PCM_SEL
23 VREG_OUT_USB 8
PCM_CLK GPIO[5]
24 VREG_OUT_HV 7
PCM2_SYNC VREG_EN
25 VREG_IN_HV 6
PCM2_IN GND_6
26 5
IC1002
PCM2_OUT GND_5
BT MODULE (WB113C)
27 4
GPIO[4] NC
28 3
GPIO[2] GND_3
29 2
GPIO[1] GND_2
30 1
GPIO[3] GND_1
R1010
0
6 7 8
R1372
0
5.2 1
VIN
C1008
2
2.2
R1374
GND
5.4 3
STBY
R1028
0
R693 C1372
0 1
C1009
2.2
C1310 R1379 R1384
0.1 39k 100k
R1029
0
L1314 L1313
IC1053
15nH 15nH
5.1 1
IN
0 2 USB CHARGING CONTROLLER,
DM_OUT
0 3
DP_OUT
3.1 4
ILIM_SEL
R1378
10k
R1001 R1380
0 10k
R1377
10k
R1381
10k
9 10 11
IC1056
+3.3V REGULATOR
IC1056
BU33TD3WG-TR
JL1125
5 3.2
VOUT
4
NC
C1360
47
C1606 C1400 C1643
1 0.001 47p
R1443
0
12 5.1
OUT
11 0
VBUS SEITCH DM_IN
10 0
IC1053
DP_IN
TPS2543RTER
9
CL1018
STATUS
D1322
DZ2J06800L
Sony CONFIDENTIAL
For Authorized Servicer
12 13
>010S
20
MAIN
(Page 35)
21
BOARD
(3/7)
31
32
>017S
33
34
MAIN
(Page 36)
35
BOARD
(4/7)
36
37
>018S
REAR_DP
REAR_DM
MAIN
(Page 38)
3.3V_HUB
BOARD
(6/7)
VCC_HUB
USB2
USB2 port
Smartphone,
CN1004 iPod/iPhone,
5P USB device
1 USB_SHIELD
2 USB_GND
3 D–
4 D+
5 V_BUS
>006S
9
10 MAIN
(Page 34)
BOARD
11
(2/7)
DSX-GS900
SYS SET