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Siemens C16 Series Instruction Set Manual page 118

16-bit cmos single-chip microcontrollers

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Long Addressing Mode
This addressing mode uses one of the four DPP registers to specify a physical 18-bit or 24-bit
address. Any word or byte data within the entire address space can be accessed with this mode.
The C167/5 devices also support an override mechanism for the DPP adressing scheme.
Note: Word accesses on odd byte addresses are not executed, but rather trigger a hardware trap.
After reset, the DPP registers are initialized in a way that all long addresses are directly
mapped onto the identical physical addresses.
Any long 16-bit address consists of two portions, which are interpreted in different ways. Bits 13...0
specify a 14-bit data page offset, while bits 15...14 specify the Data Page Pointer (1 of 4), which is
to be used to generate the physical 18-bit or 24-bit address (see figure below).
16-bit Long Address
DPP0
DPP1
DPP2
DPP3
18/24-bit Physical Address
Figure 6-1: Interpretation of a 16-bit Long Address
The SAB 8XC166(W) devices support an address space of up to 256 KByte, while the C167/5
devices support an address space of up to 16 MByte, so only the lower two or ten bits (respectively)
of the selected DPP register content are concatenated with the 14-bit data page offset to build the
physical address.
The long addressing mode is referred to by the mnemonic 'mem'.
Mnemonic Physical Address
mem
(DPP0)
(DPP1)
(DPP2)
(DPP3)
mem
pag
mem
seg
Semiconductor Group
30Mar98@15:00h
15 14 13
Long Address Range Scope of Access
|| mem∧3FFF
0000
H
|| mem∧3FFF
4000
H
|| mem∧3FFF
8000
H
|| mem∧3FFF
C000
H
|| mem∧3FFF
0000
H
|| mem
0000
C166 Family Instruction Set
...3FFF
H
H
...7FFF
H
H
...BFFF
H
H
...FFFF
H
H
...FFFF
(14-bit) Any Word or Byte
H
H
...FFFF
(16-bit) Any Word or Byte
H
H
118
Addressing Modes
14-bit page offset
Any Word or Byte
Version 1.2, 12.97
0

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