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NetStructure ZT 5504
Manual
I/O Address Map - Intel NetStructure ZT 5504 Manual
System master processor board
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Intel
NetStructure ZT 5504
Manual
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I/O Address Map
*
Onboard ISA peripherals
addressed between
100h - 7FFh decode 11 bits
of address (A0h - A10h).
Therefore, these peripherals
will alias throughout the 16-bit
I/O space at the following
ranges:
x100-x3FFh
x500-x7FFh
x900-xBFFh
xD00-xFFFh
PCI devices can fully utilize
the address space from
D00 - FFFFh, since subtractive
decoding is used for the
onboard ISA devices.
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com
D00 - FFFFh
CF8 - CFFh
PCI Config/RST Control
780 - CF7h
778 - 77Fh
400 - 777h
3F8 - 3FFh
3F0 - 3F7h
Floppy / IDE Registers
3E0 - 3EFh
3B0 - 3DFh
380 - 3AFh
378 - 37Fh
300 - 377h
2F8 - 2FFh
200 - 2F7h
1F8 - 1FFh
1F0 - 1F7h
178 - 1DFh
170 - 177h
Secondary IDE Registers
100 - 16Fh
F0 - FFh
E6 - EFh
E1 - E5h
ZT 5504 System Registers 1-5
E0Fh
C0 - DFh
On-board Slave DMA Controller
B4 - BFh
B2 - B3h
B0 - B1h
A0 - AFh
On-board Slave Interrupt Controller
93 - 9Fh
92h
Fast RESET and Gate A20
90 - 91h
81 - 8Fh
On-board DMA Page Registers
80h
79h
Board's Watchdog Timer Register
78h
Board's System Register 0
70 - 77h
On-board Real-Time Clock
60 - 6Fh
Keyboard and System Ports
50 - 5Fh
40 - 4Fh
On-board Timer/Counters
30 - 3Fh
2E - 2Fh
87309 Super I/O Configuration
22 - 2Dh
20 - 21h
On-board master Interrupt Controller
0 - 1Fh
On-board Master DMA Controller
2. Getting Started
*
PCI
PCI Reserved
LPT ECP Registers
Reserved
COM1
Reserved
VGA Registers
Reserved
LPT
Reserved
COM2
Reserved
Reserved
Primary IDE Registers
Reserved
Reserved
Coprocessor
Reserved
Reserved
Reserved
APM Registers
Reserved
Reserved
Reserved
Diagnostic Port
Reserved
Reserved
Reserved
27
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