Sony Aiwa CX-JD5 Service Manual page 74

CX-JD5
• IC Block Diagrams
– RF Board –
IC001 SP3723BDAOPM
64 63 62 61 60 59 58
INPUT
SEL ATT
4
INPUT
DVDRFP 1
MUX ATT AGC
BIAS
DVDRFN 2
2
2
INPUT
INPUT IMPEDANCE
IMPEDANCE SEL
SEL
+
CLAMP &
– ENVELOPE
BUFFER
2
LEVEL
SIGDET
DAC
COMPARATOR
A2 3
PHASE
–
DETECTOR
B2 4
+
GCA EQ
+
C2 5
PHASE
DETECTOR
D2 6
3 3
FROM FROM
VC
S-PORT S-PORT
CP 7
CN 8
A+D
D
D 9
+
GCA
+
C
C 10
FROM
+
GCA
B S-PORT
+
B 11
B+C
A
A 12 MUX GCA
3
CD/DVD
FROM
MUX
S-PORT
B+D
+
CD D 13
+
+
+
CD C 14
SUM
GCA
AMP
W/LPF
CD B 15
+
+
CD A 16
A+C
3
CD/DVD FROM
S-PORT
–
GCA
+
GCA
3 4
FROM FROM
S-PORT S-PORT
VCI FOR SERVO INPUT
VC = VPB/2
APC SEL
DUAL APC
DVD/CD
LD H/L
FROM S-PORT
17 18 19 20 21 22 23 24 25 26 27
57 56 55 54 53 52 51 50
FAST ATTACK
OUTPUT
FULL WAVE AGC CHARGE
INHIBIT
RECTIFER PUMP
PROGRAMMABLE
FROM S-PORT
EQUALIZER
FILTER
DIFFERENTIATOR
AGCO
CONTROL
SERIAL
SIGNALS
PORT
+ TO EACH
REGISTER
BLOCK
–
V33 FOR
OUTPUT
3
BUFFER
LPF ATT
CE ATT
POL SEL
CEPOL
BUFFER
–
PI
FE
TE
CE
CONTROL
V25
V125
V25/3
TOPHOLD
–
OFFSET
GCA GCA
+ CANSEL
TOPHOLD
4
FROM
S-PORT
–
OFFSET
GCA LPF GCA GCA
+ CANSEL
4 5
FROM
S-PORT
OFFSET TE
GCA LPF SUB GCA GCA GCA
CANSEL RST
6 3
CP/CN
CEFDB FROM FROM
LOW
S-PORT S-PORT
IMPEDANCE
OFFSET
GCA LPF
CANSEL
5
FOR SERVO
FROM
OUTPUT
S-PORT
HOLDEN
V25/2
SEL
BCA
TOP
DET
HOLD
COMPA-
RATOR
–
2
FROM
+
SEL GCA
DAC
S-PORT
LINKEN
HYSTERESISTER
& OFFSET
FROM S-PORT
INPUT GAIN
INPUT
FROM S-PORT AGCO
IMPEDANCE
2
MIRR
2
FROM S-PORT
COMPARATOR
SINK CURRENT
2
FROM S-PORT
PEAK/BOTTOM INPUT
INTERNAL
HOLD BUFFER
FDGHG
28 29 30 31
– DRIVER Board –
IC701, 712 BA6956AN
TSD
49
AGC
HOLD
1 2 3 4 5
48 SDEN
47 SDATA
46 SCLK
45 V33
– BD Board –
IC216 SN74ALVCH1684DGGR
44 LCP
43 LCN
1OE 1 OE LE 56 1LE
MNTR
42 MNTR
1D1 2 55
1D2 3 54
GND 4
53
1D3
5 52
41 CE 1D4 6 51
VCC 7 50
LATCH
1D5 8
49
1D6 9 48
40 FE
GND 10 47
1D7 11
46
1D8 12 45
1D9 13 44
1D10 14 43
39 TE
2D1 15 42
2D2
16 41
2D3 17 40
38 PI
GND 18 39
2D4 19
38
PH
2D5 20 37
2D6 21
36
LATCH
37 V25
VCC
22 35
36 V125
2D7 23 34
35 TPH 2D8 24 33
GND 25
32
2D9
26 31
34 DFT
2D10 27 30
33 LINK
2OE 28 OE LE 29 2LE
BOTTOM
ENVELOPE
PH
MUX
32
74 74
CONTROL LOGIC
6 7 8 9
IC252 TC7WH157FK (TE85R)
8 VCC
11 7 ST
1Q1 11 6
SELECT
1Q2
EN G
A 1
GND A Y 5 Y
B 2 B Y
1Q3
1Q4
Y 3
VCC
GND 4
1Q5
1Q6
GND
1Q7
1Q8
1Q9
1Q10
IC302 PCM1609KPTR
2Q1
2Q2
2Q3
32 31 30
36 35 34 33
GND
FUNCTION
2Q4
RST 37 CONTROL
2Q5
INTERFACE
2Q6
SYSTEM
SCKI 38
CLOCK
VCC
SCKO 39
MANAGER
2Q7
2Q8
BCK 40
LRCK 41
GND
TEST 42
4X/8X
2Q9
OVER SAMPLING
2Q10 SERIAL
DIGITAL
VDD 43
INPUT
FILTER
INTERFACE
WITH
DGND 44
FUNCTION
CONTROLLER
DATA1 45
DATA2 46
DATA3 47
ZEROA 48 ZERO DETECT
1 2 3 4 5 6 7
29 28 27 26 25
24 VCC3
23 AGND3
22 VCC4
21 AGND4
DAC LPF 20 VOUT8
19 AGND6
DAC LPF
18 VCC5
17 AGND5
DAC LPF
ENHANCED 16 VOUT7
MULTI-
DAC LPF
LEVEL
DELTA-
SIGMA 15 VCOM
MOJULE
DAC LPF
14 VOUT1
DAC LPF
13 VOUT2
DAC LPF
DAC LPF
8 9 10 11 12