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SA-NS55P
SCHEMATIC DIAGRAM - 4
I
MAIN CIRCUIT
B1
J
UART_IN
MECH_FIN
MECH_RIN
MECH_SFU
MECH_SFD
MUTEA
IPOD_DET
CD_OPEN_SW
REST_SW
D_LINK_DET1
K
D_LINK_DET2
DC_DET
AD_ACK_IN
KEY1
KEY2
Q901
B1ADCE000012
UART_OUT DETECT
L
QR901
B1GBCFJJ0051
SWITCH
M
D910
CN900
B0ACCK000005
MUTE
17
R935
100
I2S_RATE
16
N
R936
100
LINKACTIVE
15
AOUT_R
14
AGND
13
AOUT_L
12
R937
100
TO
DAC_RST
11
XM MODULE
10
3.3V
CIRCUIT (FP1)
R938
100 R939
SC_RXD
9
IN SCHEMATIC
R940
100
SC_TXD
8
DIAGRAM - 2
R941
100
ANT_REV
7
R942
100
DTIC_RST
6
DGND
5
O
DGND
4
R934
5.3V
3
5.3V
2
PWR_CTRL
1
P
: XM SIGNAL LINE
: + B SIGNAL LINE
: MAIN SIGNAL LINE
: AUX SIGNAL LINE
B2
B3
R855
R856
R860
R861
R862
R863
W1048
W1051
R915
R916
100K
100K
0
0
R869
R870
R871
R872
R873
100
W1045
0
R874
100
R875
C821
100
4700P
R877
R876
C820
10K
10K
4700P
R910
4.7K
W1013
0
R911
R914
4.7K
10K
QR901
W1146
0
CN801
NMOD
6
MICONRST
MICONRST
5
FL_CLK
SOFTWARE
OCD_SCL
4
DOWNLOAD
VSS
3
FL_DATA
OCD_SDA
2
VREF+3.3V
STBY_3.3V
1
XM_MUTE
I2S_RATE
LINKACTIVE
XM_R
AGND
XM_L
DAC_RST
3.3V
XM_RXD
10K
XM_TXD
ANT_REV
XM_RST
XM_DGND
D5V
0
XM_PCONT
B9
B10
B11
B12
B13
B4
A
C D
F G H
I
J
K L M N O P Q R S T U V
X
75
74
73
72
71
70 69
68
67
66
65
64 63
62
61
60
59
58 57
56 55
54 53
52 51
100
76
UART_IN
TU_SDA
100
77
UART_OUT
NC
1K
78
MECH_FIN
NC
1K
MECH_RIN
79
DEMO_SET
1K
80
MECH_SFU
NC
1K
81
MECH_SFD
CD_RST
82
MUTE_A
E_CS
W1123
83
HP_SW
E_CLK
0
84
IPOD_DET
[75]XM_PCONT
USB_MMOD[53]
E_DATA
100
[74]RDS_CLK
NC[52]
85
CD_OPEN_SW
ASP_DATA
100
[73]XM_RX_IN
TU_CLK[51]
86
REST_SW
ASP_CLK
[72]XM_TX_OUT
100
87
D_LINKDET1
VSS
IC807
100
88
D_LINKDET2
NC
MN101EF16ZXW
89
VDD3.3V
VDD18
MICROPROCESSOR
90
AD_ACK_IN
USB_SCL
91
VSS
[97]REGION
BLKCK[29]
CD_MLD
92
KEY1
[98]DAB_PDET
I2S_RATE[28]
USB_SDA
[99]NC
XM_MUTE[27]
93
KEY2
CD_MCLK
[100]VREF+
HALT[26]
94
NC
STAT
W1145
0
95
NC
CD_MDATA
96
DCDET
NC
97
98
99
100
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
R881
10K
R882
2.2K
R883
C810
2.2K
100P
C801
220P
C802
C817
220P
560P
R808
C816
1M
560P
C803
C804
18P
18P
C814
100P
W1012
0
C805
C819
47P
100P
W1142
0
TO MAIN
SECTION (3/3)
B14
62
B5
B6
B7
B8
A
B
TO MAIN
SECTION (1/3)
TU_SDA
50
49
R827
48
10K
47
46
R826
4R7K
CD_RST
45
44
C813
43
1000P
42
ASP_DATA
R825
1K
41
R824
1K
ASP_CLK
40
39
38
W1011
0
W1007
W1008
37
0
0
R823
100
36
CD_MLD
R822
1K
35
R821
100
W1006
0
W1010
0
34
CD_MCLK
R820
100
33
R819
100
CD_STATUS
32
CD_MDATA
R818
100
31
30
BLKCK
29
R843
220
W1004
0 W1005
0
W1009
0
I2S_RATE
28
XM_MUTE
27
R815
1K
R817
1K
HALT
26
C811
R816
C812
HP_R
100P
2.2k
1000P
AGND
HP_L
HP_SW
L850
VDD3.3V
MPORT_L
R858
C863
0
MPORT_R
6.3V1000
C864
L850, L851
G0C3R3JA0027
6.3V1000
SYS3.3V
R859
L851
0
VREF+3.3V
FL_DATA
C866
C865
FL_CLK
47P
47P
FL_CS
KEY1
KEY2
C850
0.01u
VREF+3.3V
R884
4R7K
VOL_JOG2
C853
50V3.3
VOL_JOG1
Q804
RMT
D850
B0ACEL000004
FL_RST
FL3.3V
Q804
5V
B1GBCFJN0009
RESET SWITCH
B15
I
J
K
L
CN803A
9
HP_R
8
A_GND
7
HP_L
TO
6
A9V
HP / MUSIC PORT
CIRCUIT (JW803A)
5
HP_SW
IN SCHEMATIC
4
M.PORT_DET
DIAGRAM - 7
3
M.PORT_L
2
AGND
1
M.PORT_R
M
CN901B
1
FL_DATA
2
FL_CLK
3
FL_CS
4
VREF-
5
KEY1
TO
6
KEY2
PANEL CIRCUIT
7
VREF+3.3V
(CN901A)
8
VOL_JOG2
IN SCHEMATIC
N
9
VOL_JOG1
DIAGRAM - 6
10
RMT
11
12
FL_RST
13
CD3.3V
14
5.6V
O
1/3
2/3
3/3
SA-NS55P MAIN CIRCUIT
P
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