Sony DCR-TRV33 Service Manual page 9

DCR-TRV33/TRV33E
COVER
COVER
For Schematic Diagram
• Refer to page 4-85 for printed wiring board.
1 2 3 4 5
VC-313 BOARD(4/14)
CAMERA/MPEG MOVIE/DIGITAL STILL/DV SIGNAL/AUDIO SIGNAL PROCESS
A
(TI BLOCK)
XX MARK:NO MOUNT
:Voltage measurement of the CSP IC
and the Transistors with mark,is
not possible.
NO MARK:REC/PB MODE
14 14
(6/14) (12/14)
B
14 XSYS_RST
(2/14) XSYS_RST
14 14
(7/14) (14/14)
24
(7/14)
XVSP_SCK
XVSP_SCK
VSP_SO
VSP_SO
24 18
(12/14) (2/14)
C
VCK
XCS_IC2101
XCS_IC2101 18
IC2101_VD (7/14)
IC2101_VD
VFI_OE
VFI_OE
LINEOUT_V
25 LINEOUT_V
(12/14) VREF
VREF
SSS
SSS
WEN CAM_CS
WEN
D
USB_XIN
USB_XIN
CK_CONT
BIRDS_CS 2
BIRDS_CS (1/14)
16
(5/14)
ADCK27
16 SYS_V
CLPVO
(2/14) SYS_V
16
(12/14)
E
6 6
(1/14) (3/14)
CAM_SO
CAM_SO
CAM_SCK
CAM_SCK AD4
6 6
(2/14) (12/14) AD5
AD6
SD_HIZ AD7
SD_HIZ
AD8
IFI_Y7 10
IFI_Y7 (1/14)
AD9
IFI_Y6
IFI_Y6
F
IFI_Y5 AD10
IFI_Y5
IFI_Y4 AD11
IFI_Y4
AD12
IFI_Y3
IFI_Y3
IFI_Y2 AD13
IFI_Y2
15 IFI_Y1
(2/14) IFI_Y1
IFI_Y0
IFI_Y0
IFI_C0 RYI0_DE0
IFI_C0
IFI_C1 RYI1_DE1
IFI_C1
G RYI2_DE2
IFI_C2
IFI_C2
IFI_C3 RYI3_DE3
IFI_C3
IFI_HD RYO0_DEHD
IFI_HD
RYO1_DEVD
IFI_VD
IFI_VD
RYO2_DEFLD
IFI_OE
IFI_OE
RYO3_SGOUT
RCI0_DE4
RCI1_DE5
VSP_SI
H
26 VSP_SI
(7/14)
TRRT
TRRT RCI2_DE6
FRRV
FRRV RCI3_DE7
26 TRRV
(12/14) TRRV
RCO0_EDHD
LINEOUT_V
37 LINEOUT_V RCO1_EDVD
(14/14) FRRV
FRRV RCO2_EDFLD
I
RCO3_FRMREF
MFLG_QRST
HYI_PLL27IN
HCI_FYI0
27
(7/14)
HYO_SLGATE
HCO_FYI1
VLAT_SYNC_FCI
J
FLAT_SYNC_FYO0
VLAT_IN_FYO1
TFS_FCO
THYRQ_FVDI
IC2101_Y_OUT THCRQ_FHDI
IC2101_Y_OUT
IC2101_C_OUT
IC2101_C_OUT
28 IC1901_C_OUT
(10/14) IC1901_C_OUT
AGC_CONT
AGC_CONT
K
ACC_CONT ADATAOUT0
ACC_CONT
ADATAOUT1
ADATAIN0
ADATAIN1
PANEL_G
FRAT_REFO
PANEL_G
PANEL_R
PANEL_R FS_EDGE_REF
PANEL_B
PANEL_B SFD_BCK
L
PANEL_HD
PANEL_HD SFD_LRCK
PANEL_VD
29 PANEL_VD
(14/14)
EVF_G
EVF_G
EVF_R
EVF_R
EVF_B
EVF_B
EVF_HD
EVF_HD
EVF_VD
EVF_VD
M
DATA_FROM_SFD
DATA_FROM_SFD
DATA_TO_SFD
DATA_TO_SFD
SFD_BCK
SFD_BCK
30
(13/14) SFD_LRCK
SFD_LRCK
SFD_FCK
SFD_FCK
BEEP_IN
BEEP_IN
N
USB_D+
USB_D+
USB_D-
USB_D-
31
(8/14)
O
LCKO
P
16
VC-313 (4/14)
4-2. SCHEMATIC DIAGRAMS 4-2. SCHEMATIC DIAGRAMS
6 7 8 9 10
231 230 229 228 227 226 225 224 223 222 221 220 219 218 217 216 215 214 213 212 211 210 209 208
232 VSSCR
233 D8 W19
D9 U17
234
235 TEST4 U16
236 ID V18
237 SENS0 V16
238 SENS1 Y19
239 EN00 T15
240 DVSS4 V17
241 CHCK T14
242 DVDD4
243 CK_CONT U14
R2146
IOVSS5 U15
0 244
245 ADCK27 W18
246 DIR0A V15
DIR0B W17
247
248 EN01 V14
249 IOVDD6 Y18
250 DIR1A T13
251 DIR1B Y17
252 AD0 U13
253 AD1 W16
254 AD2 V13
255 AD3 Y16
256 AD4 V12
AD5 T12
257
258 AD6 U12
259 AD7 W15
AD8 W12
260
261 AD9 Y15
262 20_25_IN W11
C2101
263 CCDMODE2 W14
0.1u
264 RYI0_DE0 V11
265 RYI1_DE1 Y14
266 RYI2_DE2 T11
267 RYI3_DE3 W13
268 RYO0_DEHD U11
269 RYO1_DEVD Y13
RYO2_DEFLD Y11
270
271 RYO3_SGOUT Y12
272 RCI0_DE4 T10
273 RCI1_DE5 U10
274 IOVSS6 V10
275 RCI2_DE6 W10
276 RCI3_DE7 Y10
277 IOVDD6 W9
278 M54_OUT Y9
279 RCO0_EDHD V9
280 RCO1_EDVD Y8
281 RCO2_EDFLD T9
282 RCO3_FRMREF V8
MFLG_QRST U9
283
284 HYI_PLL27IN Y7
C2103
0.1u
285 HCI_FYI0 W8
286 DVSSadd1 Y6
287 HYO_SLGATE T8
288 HCO_FYI1 U8
289 VLAT_SYNC_FCI W7
290 FLAT_SYNC_FYO0 Y5
291 VLAT_IN_FYO1 V7
292 TFS_FCO Y4
293 THYRQ_FVDI U7
294 THCRQ_FHDI W5
295 IOVSS7 T7
C2102
36_27_OUT Y3
0.1u 296
297 TEST5 W6
298 AUPBI1 W4
299 AUPBI2 V6
300 DVDDadd1 Y2
301 AURECO1 V5
302 AURECO2 T6
FRAT_REFO 303 IOVDD7 U6
304 FCLK W3
FS_EDGE_REF
305 FFLDI U5
SFD_BCK
SFD_LRCK 306 FVDO V4
307 FHDO T5
308 FFLDO Y1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
R2166
XX
X2101
C2104 C2144 XX
0.1u
1u
B
R2168 C2108
L2104
10uH 100k XX
R2102
0
SIGNAL PATH
VIDEO SIGNAL
AUDIO
CHROMA Y Y/CHROMA SIGNAL
REC
PB
4-43
VC-313 BOARD SIDE A VC-313 BOARD SIDE A
11 12 13 14 15 16
C2114
0.1u
R2109
0
207 206 205 204 203 202 201 200 199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180 179 178 177 176 175 174 173 172 171 170 169 168 167 166
IC2101
CAMERA PROCESS
MPEG MOVIE PROCESS
DIGITAL STILL PROCESS
DV SIGNAL PROCESS
AUDIO SIGNAL PROCESS
IC2101
CSP(CHIP SIZE PACKAGE)IC
37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77
R2115 C2119
R2111
C2112 12k 0.1u
RB2101 390
0.01u
56 ± 0.5% ± 0.5%
B
C2105
1u
R2113 R2116 R2119 R2121 C2106 C2121 R2127 C2147
390
390 ± 390 390 0.1u 0.1u 180 XX
± 0.5% ±
0.5% 0.5%
R2118 C2120 C2146
± 0.5%
390 0.1u XX
RB2102
R2117 R2151 R2152 R2155
4700
RB2103
XX XX XX XX
XX
0.7 R2153
R2149 0
0
0.7 0.7
R2114
R2154 0
0 R2150 0
Q2101
HN4A71FK(TE85R) Q2103
XX R2125
BUFFER XX
0.2
Q2102
XX
VC-313 BOARD SIDE B VC-313 BOARD SIDE B
17 18 19 20 21
C2140
10u
6.3V
TA
C2132
10u
6.3V
165 164 163 162 161 160 159 158 157 156 155
R2159
0
BIRDS_CS
R2158
XX
CAM_CS
E16 XCS 154
SD_HIZ MDQ0
A20 BUSCTL 153
VSP_SI
D16 MCSO 152
VSP_SO MDQ1
C17 MCSI 151
XVSP_SCK MDQ2
C16 MCXSCK 150
XCS_IC2101
D15 MCXCS 149
LXWAIT MDQ3
E15 LXWAIT 148
MDQ4
JAIRQ
B18 JAIRQ 147
DVSSadd2 146
LXWR MDQ5
C15 LRDXWR 145
MDQ6
LXCS
A19 LXCS 144
B15 TEST2 143
C2125 XX MDQ7
DVDDadd2
142
XSYS_RST
B17 XRST 141
R2133 1k
E14 IOVDD3 140
R2157 XX
MXWE
13.5M A18 SPCK 139
R2132
0 MXCAS
D14 IOVSS3 138
D0_LK MXRAS
B16 LDO 137
D1_LK MXCS0
C14 LD1 136
D2_LK MA13
A17 LD2 135
D3_LK MA12
B14 LD3 134
D4_LK MA10
A16 LD4 133
D5_LK MA0
D13 LD5 132
D6_LK MA1
E13 LD6 131
D7_LK MA2
B13 LD7 130
D8_LK MA3
A15 LD8
129
D9_LK
D12 LD9 128
D10_LK
A14 LD10 127
D11_LK
E12 LD11 126
D12_LK
C13 LD12 125
D13_LK
C12 LD13 124
A13 IOVDD2 123
D14_LK
B12 LD14 122
D15_LK
A12 LD15 121
C2126 0.1u
B11 IOVSS2 120
DSCK_LK
27M A11 DSCK 119
R2131 0
C11 SCAN 118
C2141
XX
D11 TEST1 117
A1_LK
E11 LA1
116
A2_LK
A9 LA2 115
A3_LK
A10 LA3 114
A4_LK
A8 LA4 113
A5_LK
D10 LA5 112
A6_LK
B8 LA6 111
A7_LK
E10 LA7 110
A8_LK
A7 LA8 109
A9_LK
C10 LA9 108
A10_LK
B7 LA10 107
A11_LK
B10 LA11 106
A12_LK
A6 LA12 105
A13_LK
B9 LA13 104 R2163
XX
A14_LK
B6 LA14 103
A15_LK
D9 LA15 102
A16_LK
E9 LA16 101
A17_LK
C9 LA17 100 5 4
A18_LK
A5 LA18 99
A19_LK
C8 LA19 98
B5 DVDD1 97 1 2 3
EVF_VD
D8 EVF_VD 96
EVF_HD C2128
A4 EVF_HD 95
XX
E8 DVSS1 94
PANEL_VD C2148
A3 PANEL_VD 93 XX
PANEL_HD B
R2130
C7 PANEL_HD 92
47k
B4 KSAOUT 91
BEEP_IN
C6 ADAO2 90
DATA_FROM_SFD
B3 ADAO1 89
C2127
0.1u
D6 ADAI2 88
DATA_TO_SFD
D7 ADAI1 87
TRRT
E7 DRP(SWP) 86
SFD_FCK
C4 FCK 85
E6 IOVDD1 84
SFD_LRCK
A2 LRCK 83
SFD_BCK
C5 BCK 82
C3 VFI_VD 81
USB_XEN
D5 USB_XEN 80
D4 USCK 79
R2139
VSSIO 78 XX
C2131
XX
R2137
XX
C2129
R2135
XX
XX
R2167
0
R2136
XX
R2129
100k
R2128
XX C2130
D2102
XX
XX
C2122
0.1u
C2123
B XX
R2138 SFD_LRCK
0
Q2104
XX
4-44
22 23 24 25
0uH
FB2102
USB_3.1V
FB2103 0uH
D_1.5V
D_2.8V
C2134 C2135 FB2101
FB2104
0.1u 0uH
0.1u 0uH
32
B B
(14/14)
A
REG_GND
AU_2.8V
A_2.8V
L2102 10uH
A_1.5V
C2136 L2103
C2145
10uH
4.7u 4.7u
R2160 B
B
XX
IC2103
MD56V62160E-10LAZ03B (DCR-TRV33)
W9864G6DB-7-ER20 (DCR-TRV33E)
CSP(CHIP SIZE PACKAGE)IC
Vss
Vcc
MDQ15
DQ15 C2137
DQ0 0.1u MA13
MA13
Vssq B
Vccq MA12
MA12
MDQ14
DQ14
MA11
DQ1
MDQ13 MA11
DQ13
MA10
DQ2
MA10
Vccq
Vssq MA9
MA9
MDQ12
DQ12
MA8
DQ3 MA8
MDQ11
DQ11
MA7
DQ4
MA7
Vssq
Vccq MA6
MA6
DQ10 MDQ10
MA5
DQ5 MA5
MDQ9
DQ9
MA4
DQ6
MA4
Vccq
Vssq MA3
MA3
DQ8 MDQ8
MA2
DQ7 MA2
Vss
MA1
Vcc C2138
MA1
NC 0.1u
DQML B MA0
MA0
DQMU
XWE MXCS0
MXCS0
MEMCK_OUT
CLK
MXRAS
XCAS
MXRAS
CKE
MXCAS
XRAS
MXCAS
NC 13
(2/14)
XCS MXWE
MXWE
MA11
A11
MEMCK_OUT
A13 MEMCK_OUT
MA9
A9
MDQ15
A12
MA8 MDQ15
A8
A10 MDQ14
MDQ14
A7 MA7
MDQ13
A0 MDQ13
MA6
A6
MDQ12
A1
MA5 MDQ12
A5
A2 MDQ11
MDQ11
A4 MA4
MDQ10
A3 MDQ10
Vss
MDQ9
Vcc
MDQ9
MDQ8
MDQ8
MDQ7
IC2103 MDQ7
MDQ6
MDQ6
MDQ5
64MBIT SDRAM
MDQ5
MDQ4
MDQ4
MDQ3
MDQ3
MDQ2
MDQ2
MDQ1
MDQ1
MDQ0
MDQ0
17
(2/14)
17
SPCK (11/14)
17
(3/14)
33
DSCK_LK (7/14)
DSCK_LK
DSCK_LK
LXWR
LXWR
D0_LK
D0_LK
D1_LK
D1_LK
D2_LK
D2_LK
D3_LK
D3_LK
D4_LK
D4_LK
D5_LK
D5_LK
D6_LK
D6_LK
D7_LK
D7_LK
D8_LK
D8_LK
D9_LK
D9_LK
D10_LK
D10_LK
D11_LK
D11_LK
D12_LK
D12_LK
D13_LK
D13_LK
D14_LK 35
D14_LK (5/14)
D15_LK
D15_LK
A1_LK
A1_LK 35
(6/14)
A2_LK
A2_LK
A3_LK
A3_LK
A4_LK
A4_LK
A5_LK
A5_LK
A6_LK
A6_LK
A7_LK
A7_LK
A8_LK
A8_LK
A9_LK
A9_LK
A10_LK
A10_LK
A11_LK
A11_LK
A12_LK
A12_LK
A13_LK
A13_LK
A14_LK
A14_LK
A15_LK
A15_LK
A16_LK
A16_LK
A17_LK
A17_LK
A18_LK
A18_LK
A19_LK
A19_LK
LXWAIT
LXWAIT
LXCS
LXCS
JAIRQ
JAIRQ
34
(5/14)
USB_CLK
SFD_LRCK