Aiwa XP-ZV700 Service Manual page 16

XP-ZV700/ZV701/ZV702
Ver. 1.4
• IC Block Diagram
– JACK Board –
IC301 TA2152FN (EL)
24 23 22 21 20 19
C-AMP SW
BIAS
PWC
PWA
1 2 3 4 5 6
• Waverforms
– EGL Board – – JACK Board –
IC401 wd (SYNC)
X601
1 qa
(CD play mode)
1.1 Vp-p
45.5 ns
500 mV/DIV, 20 ns/DIV
IC401 ta (LO_2), ts (LO_1)
qs
XP-ZV700/ZV701/ZV702
18 17 16 15 14 13
BEEP PW/MUTE SW
PWB
7 8 9 10 11 12
2.1 Vp-p
2.8 µ s
1 V/DIV, 1 µ s/DIV
2.7 Vp-p
2.8 µ s
1 V/DIV, 1 µ s/DIV
• IC Pin Function Description
EGL BOARD IC603 CXR711260-218H2 (SYSTEM CONTROLLER, DSP, LCD DRIVER)
Pin No. Pin Name I/O
1 PE6/SI1 I
2
PE5/SO1 O
3
PE4/XSCK1 O
4
PE3 O
5 VDIO0 -
6 VSS0 -
7 DVDD7 -
8 PE2/DTCK I/O
9 PE1/RXD0 I
10
PE0/TXD0 O
11
EVA -
12, 13
SDDQ16, SDDQ15 I/O
14 TAPTDO -
15, 16 I/O
SDDQ14, SDDQ13
17 SCANEN -
18, 19 SDDQ12, SDDQ11 I/O
20 TEST2 -
21, 22
SDDQ10, SDDQ8 I/O
23
VDIOSD0 -
24
VSS1 -
SDDQ9, SDDQ6,
25 to 28 I/O
SDDQ7, SDDQ2
29 TEST3 -
30, 31 SDDQ4, SDDQ3 I/O
32 TEST0 -
33 XSDWE O
34 SDDQ1 I/O
35
TEST1 -
36
SDDQ5 I/O
37
SDLDQM O
38 VDIOSD1 -
39 VSS2 -
40 SDUDQM O
41 XSDCAS O
42 XSDCS O
43
TEST5 -
44
XSDRAS O
45
SDCKE O
46 TEST6 -
47 SDCLK O
48 SDA13 O
49 XTRST -
50 to 52 SDA12 to SDA10 O
53
VDIOSD2 -
54
VSS3 -
55
DVDD0 -
16 16
Description
Serial data input from the liquid crystal display
Serial data output to the liquid crystal display
Serial clock signal output to the liquid crystal display
Chip select signal output to the EEPROM
Power supply terminal (+2.1V)
Ground terminal
Power supply terminal (+1.3V)
Not used
Not used
Not used
Not used
Two-way data bus with the SD-RAM
Not used
Two-way data bus with the SD-RAM
Not used
Two-way data bus with the SD-RAM
Not used
Two-way data bus with the SD-RAM
Power supply terminal (+2.7V)
Ground terminal
Two-way data bus with the SD-RAM
Not used
Two-way data bus with the SD-RAM
Not used
Write enable signal output to the SD-RAM
Two-way data bus with the SD-RAM
Not used
Two-way data bus with the SD-RAM
Lower byte input/output mask signal output to the SD-RAM
Power supply terminal (+2.7V)
Ground terminal
Upper byte input/output mask signal output to the SD-RAM
Column address strobe signal output to the SD-RAM
Chip select signal output to the SD-RAM
Not used
Row address strobe signal output to the SD-RAM
Clock enable signal output to the SD-RAM
Not used
Clock signal output to the SD-RAM
Address signal output to the SD-RAM
Not used
Address signal output to the SD-RAM
Power supply terminal (+2.7V)
Ground terminal
Power supply terminal (+1.3V)