Channel 2 - Texas Instruments TAS2563 User Manual

Evaluation module
Table of Contents

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1.8V
J4
VDD2
IOVDD
J5
IOVDD2
TP1
PVDD2
ASI1
SBCLK1
FSYNC
SDIN1
ASI2
SDOUT2-1
J9
3
4
1
2
PDM2
GND
CONTROL
SD
I2C/SPI
SCL_SEL2
SDA_MOSI
SPII2C_MISO
ADDR_SPICLK2
SLAU800 – January 2019
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VBAT2
C7
C8
0.01uF
4.7uF
GND
GND
GND
C9
C10
0.01uF
1µF
U2
L1
D1
VBAT
D2
VBAT
1uH
GND
GND
F1
SW
F2
SW
SW2
F3
SW
VDD2
C6
VDD
IOVDD2
A6
IOVDD
PVDD2
G1
VBST
C11
C12
C13
G2
VBST
1µF
10µF
10µF
G3
VBST
16V
25V
25V
G4
PVDD
G5
PVDD
G6
PVDD
GND
GND
GND
SBCLK1
B2
SBCK1
FSYNC
B3
FSYNC
SDIN1
C2
SDIN1
SBCLK1
A5
SBCLK2
SDOUT2-1
A4
SDIN2
PCMCK2
A1
PDMCK
PDMD2
A2
PDMD
SCL_SEL2
B4
SCL_SEL
SDA_MOSI
B5
SDA_MOSI
SD
B1
SD
C3
SPII2C_MISO
SPII2C_MISO
ADDR_SPICLK2
C4
ADDR_SPICLK
TAS2563YBG
Address = 0x9A
PVDD2
Figure 13. Channel 2
Copyright © 2019, Texas Instruments Incorporated
VBAT
C3
C2
C1
10µF
10µF
0.1µF
25V
25V
J1
VBAT2
GND
GND
OUT-2P
R3
0
F5
OUT_P
D5
R20
0
VSNS_P2
VSNS_P
D3
R21
0
VSNS_N2
VSNS_N
OUT-2N
R4
0
F6
OUT_N
C1
SDOUT1
SDOUT1
SDOUT2-2
A3
SDOUT2
IRQ2
C5
IRQ
B6
DREG2
DREG
GREG2
D4
GREG
D6
GPIO
GPIO2
F4
GNDD
E6
GNDP
E5
GNDP
E4
GNDD
E3
GNDB
E2
GNDB
C14
E1
GNDB
1µF
GND
GND
C15
0.1µF
EVM Schematics
DF2SE
R5
OUT2+
VSENSE2+
0
R6
OUT2-
VSENSE2-
0
R2
C51
OUT2-
0
1µF
R24
C50
OUT2+
0
1µF
SNUBBER
OUT2+
C49
OUT2+
1µF
OUT2-
OUT2-
C5
C6
AUX Connector
GND
GND
OUT2+
OUT2-
SDOUT1
ASI1/ASI2
SDOUT2-2
CONTROL
IRQ2
C45
0.01uF
GND
TAS2563YBGEVM-DC Evaluation module
GND
OUT2+
J6
OUT2
OUT2-
J3
OUT2
13

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