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Power
13.0
Power
The Intel® Quark™ SE SoC-based platform has the option to use either internal
regulators from the SoC or external power sources from the platform. This chapter
provides information about how to configure both internal and external voltage
regulators (VRs).
13.1
Configuration for External VR
During power-up, the SoC determines the platform VR usage (whether internal or
external) based on the PLT_REG_EN strap signal status. The SoC has two distinctive
power up sequences for both internal and external platform power up options.
Once the SoC identifies the PLT_REG_EN status, the SoC follows the appropriate
power up sequencing for the platform power supply selected by the design. The
details of these power up sequences are documented in the Intel® Quark™ SE
Microcontroller C1000 Datasheet.
The following steps provide guidelines for configuring the SoC when an external
platform power source is required:
1. Tie the strap pin PLT_REG_EN to the VCC_AVD_OPM_2P6 power rail. This
voltage is an output from the SoC (VCCOUT_AVD_OPM_2P6).
Caution: Special care must be taken in the event of a hardware power down of
VCC_BATT_OPM_3P7 followed by a power up sequence. Please ensure that the
Intel® Quark™ SE Microcontroller C1000 reference voltage OPM_2P6 is
discharged to ground before a power up cycle. For suggestions on how to
ensure the correct voltage levels in VCC_AVD_OPM_2P6 at any time, refer to
the Intel® Quark™ SE Microcontroller C1000 Power Sequencing Considerations
Application Note.
2. Connect VCCOUT_QLR1_3P3 and VCCOUT_QLR2_1P8 to reference plane
(GND).
3. Connect VCC_VSENSE_PLAT_3P3 and VCC_VSENSE_PLAT_1P8 to reference
plane (GND).
4. Connect VSS_GNDSENSE_ESR1 and VSS_GNDSENSE_ESR2 to reference plane
(GND).
5. Leave the VCCOUT_PLAT_3P3_3P3 and VCCOUT_PLAT_1P8_1P8 pins
unconnected.
If the system needs to support sleep state, the external power supply that is
Note:
connected to the VCC_AON_1P8 pin must be active (always on) while the system
goes into sleep mode.
The following figures depict the steps outlined above.
June 2017
Document Number: 334715-004EN
Intel® Quark™ SE Microcontroller C1000
Platform Design Guide
51
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