Fpga; Front-Blade Interface; Sfp/Sfp+/Qsfp+ Control And Status - Emerson RTM-ATCA-F140 Installation And Use Manual

Functional Description
4.8

FPGA

The RTM-ATCA-F140 includes a Xilinx XC3S200A-4 FPGA that which performs the following
functions:
Access to control and status signals on SFP, SFP+, and QSFP+

Access to control and status signals on the BCM8727, BCM84754, and BCM84740

Reset handling

Recovery of received clocks from BCM8727 for use as a Synchronous Ethernet reference

clock
Reception of GPS inputs (1PPS, 10MHz, Time-Of-Day)

SPI Flash programmer and multiplexing for BCM8727, BCM84754, and BCM84740

configuration
UART with selectable outputs for the optional GPS receiver (functionality not initially

implemented)
4.8.1

Front-blade Interface

The RTM-ATCA-F140 includes an SPI interface between the front-blade service processor and
the RTM FPGA. There is also an active low interrupt line to the front-blade to request service.
4.8.2

SFP/SFP+/QSFP+ Control and Status

The RTM FPGA provides register access to control the following SFP and SFP+ signals:
SFP TX_DISABLE

SFP RATE_SEL

SFP+ RS0/1 (tied together)

The RTM FPGA provides access to the following SFP, SFP+, and QSFP+ signals:
SFP MOD_ABS

SFP TX_FAULT

SFP LOS

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EA Version
RTM-ATCA-F140 Installation and Use (6806800M97A)