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A.1
Jumper Descriptions
The EVM jumpers are shown in
reset the EVM in the default configuration, in case of issues.
Jumper
SW1
SJP2
SJP1
SJP3
A.2
Connector Descriptions
The EVM connectors and their function are described in
Connector
J2
J1 (Not installed)
J3
J4 (Not installed)
J5
J6
J7
J8 (USB)
J9 (+5V IN)
16
Jumper, Connector, and LED Descriptions
Jumper, Connector, and LED Descriptions
Table 6
as well as the default settings for the jumpers. Use this table to
Table 6. Jumper Descriptions and Default Settings
Description
ADC hardware reset (active high)
Power enable to VCXO oscillator Y1. Default is power on.
Selects either 3.3 V or GND for Y1 enable. Default is open
Selects either diff sync or single-ended sync from FMC. Default is diff.
Table 7. Connector Descriptions
Description
Channel A positive analog input
Channel A negative analog input. Used for differential input mode only.
Channel B positive analog input
Channel B negative analog input. Used for differential input mode only.
External ADC sample clock input
LMK04828 reference clock input
JESD204B FMC connector. Interfaces to TSW14J56EVM or FPGA evaluation boards
USB interface connector. Not used.
5-V power supply input
Copyright © 2016, Texas Instruments Incorporated
Default setting
Logic low
Shunt pins 1-2
Open
Shunt pins 2-3
Table
7.
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Appendix A
SLAU687 – May 2016
SLAU687 – May 2016
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