Smbus Access - MSI MS-98L2 Manual

Appendix
Clear WDT Reset Flag
val = Inportb (WDT_BASE + 0x05);
val = val | 0x40;
Outportb (WDT_BASE + 0x05, val);

SMBus Access

The base address of SMBus must be known before access. The relevant bus and
device information are as following.
#define IO_SC
#define IO_DA
#define PCIBASEADDRESS
#define PCI_BUS_NUM
#define PCI_DEV_NUM
#define PCI_FUN_NUM
Get SMBus Base Address
int SMBUS_BASE;
int DATA_ADDR = PCIBASEADDRESS + (PCI_BUS_NUM<<16) +
Outportl (DATA_ADDR + 0x20, IO_SC);
SMBUS_BASE = Inportl (IO_DA) & 0xfffffff0;
SMBus_ReadByte (char DEVID, char offset)
Read the value of OFFSET from SMBus device DEVID.
Outportb (LOWORD (SMBUS_BASE), 0xFE);
Outportb (LOWORD (SMBUS_BASE) + 0x04, DEVID + 1);
Outportb (LOWORD (SMBUS_BASE) + 0x03, OFFSET);
Outportb (LOWORD (SMBUS_BASE) + 0x02, 0x48);
mdelay (20);
while ((Inportl (SMBUS_BASE) & 0x01) != 0);
SMB_DATA = Inportb (LOWORD (SMBUS_BASE) + 0x05);
SMBus_WriteByte (char DEVID, char offset, char DATA)
Write DATA to OFFSET on SMBus device DEVID.
Outportb (LOWORD (SMBUS_BASE), 0xFE);
Outportb (LOWORD (SMBUS_BASE) + 0x04, DEVID);
Outportb (LOWORD (SMBUS_BASE) + 0x03, OFFSET);
Outportb (LOWORD (SMBUS_BASE) + 0x05, DATA);
Outportb (LOWORD (SMBUS_BASE) + 0x02, 0x48);
mdelay (20);
A-4
// Read current WDT setting
// Set 1 to WDTMOUT_STS (bit 6);
// Write back WDT setting
0xCF8
0xCFC
0x80000000
0
31
4
(PCI_DEV_NUM<<11) +
(PCI_FUN_NUM<<8);
//out Base + 04, (DEVID + 1)
//out Base + 03, OFFSET
//out Base + 02, 48H
//delay 20ms to let data ready
//wait SMBus ready
//input Base + 05
//out Base + 04, (DEVID)
//out Base + 03, OFFSET
//out Base + 05, DATA
//out Base + 02, 48H
//wait 20ms