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Description
1
Description
This EVM features the TPSM84824/624/424 synchronous buck power module configured for operation
with a 4.5-V to 17-V input voltage range. The output voltage can be set to one of six popular values by
using a configuration jumper. Similarly, the switching frequency can be set to one of six values with a
jumper. Additionally, the RTT resistor value, which selects the TurboTrans feature for improved transient
response, is also selectable using a jumper. The full output current rating of the device can be supplied by
the EVM. Input and output capacitors are included on the board to accommodate the entire range of input
and output voltages. Monitoring test points are provided to allow measurement of efficiency, power
dissipation, input ripple, output ripple, line and load regulation, and transient response. Control test points
and component footprints are provided for use of the ENABLE, PGOOD, and CLK features of the device.
The EVM uses a recommended PCB layout that maximizes thermal performance and minimizes output
ripple and noise.
2
Getting Started
Figure 1
highlights the user interface items associated with the EVM. The VIN Power terminal block (J1) is
used for connection to the host input supply and the VOUT Power terminal block (J2) is used for
connection to the load. These terminal blocks can accept up to 16-AWG wire.
The S+ and S- test points for both VIN and VOUT, located near the power terminal blocks are intended to
be used as voltage monitoring points where voltmeters can be connected to measure VIN and VOUT. Do
not use these S+ and S- monitoring test points as the input supply or output load connection
points. The PCB traces connecting to these test points are not designed to support high currents.
The VIN Scope (J3) and VOUT Scope (J4) test points can be used to monitor VIN and VOUT waveforms
with an oscilloscope. These test points are intended for use with un-hooded scope probes outfitted with a
low-inductance ground lead (ground spring) mounted to the scope probe barrel. The two sockets of each
test point are on 0.1 inch centers. The scope probe tip should be inserted into the socket marked with a
white dot, and the scope ground lead should be inserted into the other socket.
The control test points located to the left of the device are made available to test the features of the
device. The UVLO feature can be adjusted by changing resistors R24 and R25 on the bottom of the
board. An external voltage can be applied to the PULL_UP test point for the PGOOD signal. Refer to the
Test Points Descriptions
2
Using the TPSM84824, TPSM84624, and TPSM84424EVM
Figure 1. EVM User Interface
section of this guide for more information on the individual control test points.
Copyright © 2017–2018, Texas Instruments Incorporated
SNVU581A – November 2017 – Revised March 2018
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