Integra DTR-7.6 Series Service Manual page 38

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IC BLOCK DIAGRAMS AND DESCRIPTIONS
CS42528 (8-Ch Codec with S/PDIF Receiver)
TERMINAL DESCRIPTION
Pin Name #
VA 24
VARX 41
AGND 25
40
MUTEC 38
LPFLT 39
RXP7/GPO7 42
RXP6/GPO6 43
RXP5/GPO5 44
RXP4/GPO4 45
RXP3/GPO3 46
RXP2/GPO2 47
RXP1/GPO1 48
RXP0 49
TXP 50
TE
L 13942296513
VLP 53
SAI_SDOUT 54
RMCK 55
CX_SDOUT 56
ADCIN1 58
ADCIN2 57
OMCK 59
SAI_LRCK 60
SAI_SCLK 61
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Pin Description
Analog Power (Input) - Positive power supply for the analog section.
Analog Ground (Input) - Ground reference. Connects to analog ground.
Mute Control (Output) - The Mute Control pin outputs high impedance following an initial power -on con-
dition or whenever the PDN bit is set to a "1", forcing the codec into power -down mode. The signal will
remain in a high impedance state as long as the part is in power-down mode. The Mute Control pin goes
to the selected "active" state during reset, muting, or if the master clock to left/right clock frequency ratio
is incorrect. This pin is intended to be used as a control for external mute circuits to prevent the clicks
and pops that can occur in any single supply system. The use of external mute circuits are not manda-
toy but may be desired for designs requiring the absolute minimum in extraneous clicks and pops.
PLL Loop Filer (Output) - An RC network should be connected between this pin and ground.
S/PDIF Receiver Input/ General Purpose Output (Input/ Output) - Receiver inputs for S/PDIF encoded
data. The CS42528 has an internal 8:2 multiplexer to select the active receiver port, according to the
Receiver Mode Control 2 resister. These pins can also be configured as general purpose output pins,
ADC Overflow indicators or Mute Control outputs according to the RXP/General Purpose Pin Control
resisters.
S/PDIF Receiver Input (Input) - Dedicated receiver input for S/PDIF encoded data.
S/PDIF Transmitter Output (Output) - S/PDIF encoded data output, mapped directly from one of the
receiver inputs as indicated by the Receiver Mode Control 2 resister.
Serial Port Interface Power (Input) - Determines the required signal level for the serial port interfaces.
Serial Audio Interface Serial Data Output (Output) - Output for two's complement serial audio PCM
data from the S/PDIF incoming stream. This pin can also be configured to transmit the output of the inter-
nal and external ADCs.
Recovered Master Clock (Output) - Recovered master clock output from the External Clock Reference
CODEC Serial Data Output (Output) - Output for two's complement serial audio data the internal
and external ADCs.
External ADC Serial Input (Input) - The CS42528 provides for up two external stereo analog to digital
converter inputs to provide a maximum of six channels on serial data output line when the CS42528
is placed in One Line mode.
External Reference Clock (Input) - External clock reference that must be within the ranges specified in
currently active on the serial audio data line.
Serial Audio Interface Left/Right Clock (Input/Output) - Determines which channel, Left of Right, is
currently active on the serial audio data line.
Serial Audio Interface Serial Clock (Input/Output) - Serial clock for the Serial Audio Interface
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