Clock Speed - Sundance Spas SMT332 User Manual

Version 1.3

Clock Speed

The 'C6x01 clock speed must be set in conjunction with consideration to EMIF device
speeds. Under most circumstances, the 'C6201 would be set to 200MHz and have
an SBSRAM speed equal to the core speed. The 'C6701 would be set to 166MHz.
The following table shows all available possibilities:
Device
'C6x01 SBSRAM
133 133
166 166
200 100
200 200
The following table defines the link positions of JP1 and the resultant clock speed.
S0, S1 and S2 refer to the following link positions on JP1. Link in to force a '0'.
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SDRAM
67
83
100
100
S2 S1
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
S2 S1 S0
Comment
Zero wait state SBSRAM
Zero wait state SBSRAM
One wait state SBSRAM
Zero wait state SBSRAM
S0 CLK (MHz)
0 200
1 182
0 167
1 154
0 143
1 133
0 125
1 118
SMT332/372 User Manual