Siemens Simatic S7-1500 Function Manual page 34

Cycle and response times
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Extension due to nesting of higher-priority OBs and/or interrupts
The interruption of a user program at the end of an instruction by a higher-priority OB causes
a certain basic time expenditure. Take account of this basic time expenditure in addition to
the update time of the assigned process image partitions and the execution time of the
contained user program. The following tables contain the typical times for the various
interrupts and error events.
Table 3- 3
Basic time expenditure for an interrupt
1511(F)-1 PN
1511T(F)-1 PN
1511C-1 PN
1512C-1 PN
1513(F)-1 PN
Hardware inter-
90 μs
rupt
Time-of-day inter-
90 μs
rupt
Time-delay inter-
90 μs
rupt
Cyclic interrupt
90 μs
1513R-1 PN
Hardware inter-
170 μs
rupt
Time-of-day inter-
170 μs
rupt
Time-delay inter-
170 μs
rupt
Cyclic interrupt
170 μs
* Additional information about cycle and response times of R/H CPUs is available in the section "Cycle and response times
of the S7-1500R/H redundant system"
1510SP(F)-1 PN
Hardware inter-
90 μs
rupt
Time-of-day inter-
90 μs
rupt
Time-delay inter-
90 μs
rupt
Cyclic interrupt
90 μs
Cycle and response times
Function Manual, 10/2018, A5E03461504-AD
S7-1500
1515(F)-2 PN
1515T(F)-2 PN
1516(F)-3 PN/DP
1516T(F)-3 PN/DP
80 μs
80 μs
80 μs
80 μs
S7-1500R/H* in RUN-Solo system state
1515R-2 PN
140 μs
140 μs
140 μs
140 μs
ET 200SP
1512SP(F)-1 PN
90 μs
90 μs
90 μs
90 μs
Cyclic program execution
1517(F)-3 PN/DP
1517T(F)-3 PN/DP
20 μs
20 μs
20 μs
20 μs
1517H-3 PN
20 μs
20 μs
20 μs
20 μs
1515SP(F)-PC
80 μs
80 μs
80 μs
80 μs
3.2 Cycle time
1518(F)-4 PN/DP
1518(F)-4 PN/DP MFP
12 μs
12 μs
12 μs
12 μs
33

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