NAD C715 Service Manual page 32

Pin
Pin name
No.
57 DOUT
58 AOUT
59 BCK
60 LRCK
61 AIN
62 BCKI
63 LRCKI
64 VDD1
65 VSS1
66 AWRC
67 PVDD3
68 PDO
69 TMAX
70 LPFN
71 LPFO
72 PVREF
73 VCOF
74 VCOREF
I/O
Digital-out output pin. Digital data for up to
O
double speed can be output when a
3I/F
frequency of 16.9344 MHz is used.
Audio data output pin. Which bit is first
O
(MSB first or LSB first) can be selected,
3I/F
using a command.
O Bit clock output pin. 32fs, 48fs, and 64fs
3I/F can be selected, using a command.
LR channel clock output pin. "L" for the
O L-channel and "H" for the R-channel. The
3I/F output polarity can be inverted, using a
command.
I
1-bit DAC external input: AIN
3I/F
I
1-bit DAC external input: BCKI
3I/F
I
1-bit DAC external input: LRCKI
3I/F
1.5 V supply voltage pin dedicated to the
—
DSP circuit.
1.5 V grounding pin dedicated to the DSP
—
circuit.
O
VCO control pin for active wide range.
3AI/F
3.3 V supply voltage pin dedicated to the
—
PLL circuit.
O Pin for outputting a phase difference signal
3AI/F between the EFM signal and PLCK signal.
Pin for outputting the result of TMAX
O
detection.
3AI/F
The TMAX pin output the same signal.
I Pin for receiving an inverted output of the
3AI/F PLL-circuit low-pass filter amp.
O Pin for the PLL-circuit low-pass filter amp
3AI/F output.
1.65 V reference supply voltage pin
—
dedicated to the PLL circuit.
O
VCO filter pin.
3AI/F
I Input pin for the VCO center frequency
3AI/F reference level.
Description
2-21
Remark
As per CP-1201
—
Normal speed
: 32fs = 1.4112 MHz
Normal speed: 44.1 kHz
1-bit DAC external input
Controllable in CLV/CAV.
—
Quaternary output
(PVDD3, HiZ, VSS, and
PV ).
REF
Ternary output
(PVDD3, VSS, and Hiz).
The resistance side is
connected. See an
applicable circuit diagram.
The capacitor side is
connected. See an
applicable circuit diagram.
Connected to the V
REF
and PV within the IC.
REF
A 0.1 uF capacitor is
connected.
—
To be connected to the
PV if the AWRC is not
REF
used.