NAD C715 Service Manual page 30

Pin
Pin name
No.
SFSY
(EMPH)
17
(LOCK)
(MONIT)
ZDET
18 (DATA)
(COFS)
19 GPIN
20 VSS1
21 VDD1
22 XVSS3
23 XI
24 XO
25 XVDD3
26 DVSS3
27 RO
28 DVDD3
29 DVR
30 LO
31 DVSS3
32 VSS3
33 VDD3
34 VDDM
35 VSS1
I/O
Pin for outputting the playback frame sync
signal.
(Emphasis flag output pin.
O ENPH on: "H". EMPH off: "L".
3I/F The output polarity can be switched, using a
command.)
(LOCK signal)
(Pin for monitoring signals in the DSP.)
Output pin for zero detection flag for the
1-bit DAC.
O
(Pin for outputting subcode P to W data)
3I/F
(Error Correstion Frame Clock 7.35kHz
output)
I/O
General-purpose I/O DSP
3I/F
1.5V grounding pin dedicated to the Digital
—
circuit.
1.5 V supply voltage pin dedicated to the
—
Digital circuit.
Grounding pin for the system clock
—
oscillation circuit.
I Input pin for the system clock oscillation
3AI/F circuit.
O Output pin for the system clock oscillation
3AI/F circuit.
3.3 V supply voltage pin for the system
—
clock oscillation circuit.
— Grounding pin for the 1-bit DAC.
O Output pin for normal R-channel data for
3AI/F the 1-bit DAC.
— 3.3 V supply voltage pin for the 1-bit DAC.
O Reference voltage pin for the 1-bit DAC.
O Output pin for normal L-channel data for
3AI/F the 1-bit DAC.
—
Grounding pin for the 1-bit DAC.
3.3 V grounding pin dedicated to the I/F
—
circuit.
3.3 V supply voltage pin dedicated to the I/F
—
circuit.
1.5 V supply voltage pin dedicated to the
—
DSP/1Mbit SRAM circuit.
1.5V grounding pin dedicated to the
—
DSP/1Mbit SRAM circuit.
Description
2-19
Remark
7.35kHz
(At this pin, flags in the
DSP and PLL-circuit clock
can be monitored, using
microcontroller commands.
The pin also outputs text
data serially.)
Valid also for 1-bit DAC
external inputs.
General-purpose I/O
(input after a reset).
—
—
—
—
Input to the internal MCK.
—
—
No capacitor is required at
the DVR pin unless the
built-in 1-bit DAC is used.
3.3 V must be applied
across the DVDD3 and
DVSS3 pins, however.
—
—
—
—
—