Schematic Diagram; Main(Micon/Tuner) Circuit - Panasonic SA-BT230P Service Manual

17 Schematic Diagram

17.1. Main(Micon/Tuner) Circuit

1 2 3
SCHEMATIC DIAGRAM - 18
A
A MAIN(MICON) CIRCUIT
B
iPod_CTRL_SW
R2370 330
C
EEPROM_DA R2367 100
EEPROM_CLK R2366 100
TRY_DILECT
R2396 330
BATTPCONT
iPod_ACC
TRY_PFAIL
8 7
RX2302
6 5
OPT_IN_SEL1 D1H83314A024
4 3
OPT_IN_SEL2
2 1
SEL_A
SEL_B
D
KEY2
KEY1
ASS_IN
R2381 330
R2382 330
D2301
C2302
B0BC3R0A0262
0.1
APD R2302 2.2K C2306
C2307 0.1
LED_CONT
R2399 330
R2310 10K
C2308 4700P
E
PW_GOOD R2318 1K
ECO_CTL R2304 330
DR_P_ON_H
R2397 330
C2309 4700P
R2311 10K
R2305
RX2307
47K
D1H83314A024
JC_P_ON_H
8 7
P_STANBY_H
6 5
RMT
4 3
ASS_MUTE
F 2 1
XMPREQ
PW_VREF
PW_D3R3V
MICON_GND
RX2308
D1H83314A024
G
FLD_STB
1 2
FLD_DAT
3 4
FLD_CLK
5 6
7 8
TO MAIN(MICON)
SECTION (4/6)
H
4 5 6
: +B SIGNAL LINE : -B SIGNAL LINE : iPod/iPhone/AUX/OPTICAL/MIC/HDMI AUDIO INPUT SIGNAL LINE
R2346
10K
2 4 6 8 2 4 6
2 4 6 8
1 3 5 7 1 3 5 7
1 3 5 7
C2304
0.1
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52
81
82
83
84
85 EEPROM_SDA
[50] PCONT
86 EEPROM_SCL [81] TRY_DILECT FX_SCS
[49] SCLK (BP1)
[82] BATTPCONT
87 OPT_IN_SEL1 TRY_OP_CL
[48] SBMTP
[83] iPod_ACC
88 OPT_IN_SEL2 [47] SBPTM FX_DET
[84] TRY_PFAIL
SEL_A
89 IC2300 TUN_GPIO
SEL_B
90 RFKWMBT230P
KEY2
91 MICRO PROCESSOR iPhone_RST
92 KEY1 iPhone_CLK
93 ASS_IN iPhone_DAT
[97] APD
94 DAC_RESET TUN_RST
[98] VREF [33] SCLK(DEBUG/DL)
95 UART_RX
DAC_PD
[99] AVCC [32] DBG_RX
96 AVSS [100] LED_CONT [31] DBG_TX UART_TX
97 DAP_MUTE
98
0.1
99
100
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
C2301
47P
3
2
1
X2300
H2D500400006
R2315 R2361 47K
150K
C2314
6.3V100
7 8 9
: iPod/iPhone VIDEO INPUT SIGNAL LINE
R2356
10K
PW_ST_D3R3V
R2333 47K
WL_I2S_OUT4
8
WL_I2S_OUT3
R2332 47K
WL_BCK_OUT
WL_DATA_GND
WL_LRCK_OUT
R2395 FX_SCS
330
FX_CLK
FXDI_DA
51 RX2304 FXDO_DA
D1H83314A024
FX_INT
PCONT
50 8 7
CLK_SCLK
49
6 5
SBMTP PW_WL5V
48 4 3
WL_D5VGND
SBPTM
47 2 1
R2352 10K
CE 46
FX_SCS FX_DET
45
44
FX_DET
QUICK_PCONT1
43
TUN_GP_IO
42 DAP_RST
TRY_OP_CL
R2328 10K
EPM 41 8 7 DAP_MUTE
iPhone_RST
40 6 5 DSP_DA
iPhone_CLK
39 DSP_CLK
4 3
iPhone_DA
RX2305
38 2 1 MICON_GND
D1H83314A024
TUN_REST
37 DSP_MCLK_OUT
R2378 330 UART_RX
36 DSP_OUT_GND
UART_TX
R2379 330
35 DSP_LRCK_OUT
R2343 330 DAP_MUTE
34 DSP_BCK_OUT
R2341 47K
33
32 DSP_I2S_OUT3
R2342 47K
31 DSP_I2S_OUT2
R2335 R2301 47K DSP_I2S_OUT1
30 47K
CEC
DC_DET2
H_MUTE
DSP_CLK
FAN_ON_H
DSP_DA
PW_D3R3V_DSP
TUN_SDIO_DA
SYNC
DC_DET2
8 7
KEY1
6 5
4 3
DC_DET1
2 1
RX2301
D1H83314A024 TUN_SCLK
GND
BP: MAIN(BP1): SCHEMATIC DIAGRAM - 1 ~ 2
D0: MAIN(BP1 CH0): SCHEMATIC DIAGRAM - 3
D1: MAIN(BP1 CH1): SCHEMATIC DIAGRAM - 4
DN: MAIN(DIGITAL NET): SCHEMATIC DIAGRAM - 5
EX: MAIN(EXBUS): SCHEMATIC DIAGRAM - 6 ~ 7
ET: MAIN(ETHER): SCHEMATIC DIAGRAM - 8
DH: MAIN(DAC HDMI): SCHEMATIC DIAGRAM - 9 ~ 10
FE: MAIN(BP1 FE): SCHEMATIC DIAGRAM - 11 ~ 14
PE: MAIN(BP1 PERI): SCHEMATIC DIAGRAM - 15 ~ 16
VO: MAIN(VIDEO OUT): SCHEMATIC DIAGRAM - 17
MA: MAIN(MICON): SCHEMATIC DIAGRAM - 18 ~ 23
TN: MAIN(TUNER): SCHEMATIC DIAGRAM - 24
105
10 11 12
: AUDIO OUTPUT SIGNAL LINE : FM SIGNAL LINE
CN2008
1
17 RF_GND
16 ADAT1
15 ADAT0
14
DGND
13 BCLK
12 DGND
J
11 LRLK TO
10 SSB WIRELESS ADAPTER
9 SCL
CIRCUIT (CN3001)
8 SDI IN SCHEMATIC
7 SDO
DIAGRAM - 34
6
INT
5 RF+5V
4 RF+5V
3 RF_GND
2 RF_GND
1
WM_DET
17
R2090 220
CN2006
R2181 220 1
18 RESET
R2182 220
17 MUTE
R2183 220
16 DAP_SDA
R2184 220
15 DAP_SCL
14 DGND
R2081 47
13 MCLK
12 DGND C
R2082 47 TO
LRCLK
11
D-AMP CIRCUIT
R2083 47
10 SCL
(CN5402)
9 SDIN4
R2086 47 IN SCHEMATIC
8 SDIN3
R2085 47 DIAGRAM - 27
7 SDIN2
R2084 47
6 SDIN1
5 DGND
R2093 220
4 DC_DET2
R2094 220
3 ECO_DAMP
2 FAN (CATER AK)
R2098 0
1 +3.3V
18
CN2003
1 VREF
2 BUSY
3 CLOCK
4 RxD
5 CE
TO uP DOWNLOADER
6 EPM
7 DGND
8 RESET
9 CNVSS
10 TxD
1/6 2/6 3/6
4/6 5/6 6/6
SA-BT230P/PC,SA-BT330P/PC MAIN(MICON) CIRCUIT
13 14
TO MAIN(MICON)
SECTION (2/6)