Clarion NAX963HD Service Manual page 12

051-5344-90 NJM2267V-TE2
8
6dB
2.2k ohm
1
6dB
2.2k ohm
051-5408-38 R3112N211A-TR-FA
OUTPUT 1
VDD 2
GND 3
Terminal description
pin 1: OUTPUT : N channel open drain output.
This terminal will output L, if the voltage of
VDD becomes lower than the setting voltage.
pin 2: VDD : Positive supply voltage.
pin 3: GND : Ground.
pin 4: N.C. : Not in use.
pin 5: C.T. : Delay time capacitor connection.
051-5418-28 R3111N271A-TR-FA
Precision Voltage Down Detector 2.7V
OUTPUT 1
VDD 2
GND 3
Terminal description
pin 1: OUTPUT : N channel open drain output.
This terminal will output L, if the voltage of
VDD becomes lower than the setting voltage.
pin 2: VDD : Positive supply voltage, negative logic input.
pin 3: GND : Ground.
pin 4: NC : Not in use.
pin 5: NC : Not in use.
051-6650-90 NB2305AT1HDR2G
REF 1 PLL
CLK 2 2
CLK 1 3
GND 4
NAX963HD
Dual Video Driver
75ohm Driver
5
6
75ohm Driver
4
3
VCC GND
7 2
Voltage Drop Detector 2.1V
5 C.T.
4 N.C.
5 N.C.
4 N.C.
3.3V Zero Delay Clock Buffer
8 CLK OUT
7 CLK 4
6 VDD
5 CLK 3
Terminal Description
pin 1: REF : Input reference frequency, 5 V tolerant input.
pin 2: CLK 2 : Buffered clock output.
pin 3: CLK 1 : Buffered clock output.
pin 4: GND : Ground.
pin 5: CLK 3 : Buffered clock output.
pin 6: VDD : 3.3 V supply.
pin 7: CLK 4 : Buffered clock output.
pin 8: CLK OUT : Buffered clock output, internal feedback on
this pin.
051-6718-90 AK5357VT-E2
Terminal Description
pin 1: A IN R : IN : R channel audio signal input.
pin 2: A IN L : IN : L channel audio signal input.
pin 3: CK S 1 : IN : Clock Mode select.
pin 4: V COMMON : O : Common voltage output = A VDD/2
pin 5: A GND : - : Analog ground.
pin 6: A VDD : - : Positive voltage supply for analog section.
pin 7: D VDD : - : Positive voltage supply for digital section.
pin 8: D GND : - : Digital ground.
pin 9: SDO : O : Audio Serial data output.
pin 10: LR CK I/O :I/O: Output channel clock. L output in Master
pin 11: MASTER CLK : IN : Master clock input.
pin 12: S CLK :I/O: Audio Serial data clock input. L output in
pin 13: PDN : IN : Power down & reset signal input.
pin 14: DIF : IN : Audio interface format.
pin 15: CK S 2 : IN : Clock Mode select.
pin 16: CK S 0 : IN : Clock Mode select.
051-6731-90 WM8718SEDS/R
24 bit Differential Stereo DAC with Volume control
M a s t e r C l o c k 18
L R C K I N 1
A u d i o
B i t C K I N 19
I n t e r f a c e
D ATA I N 20
A V D D 4
Vr e f P 5
V M I D 8
Vr e f N 6
A G N D 7
L AT C H I N 13
S e r i a l d a t a I N 14
S e r i a l C K I N 15
051-6834-00 XC3S50-4VQG100I-0985
Terminal Description
pin 1: A20 : Address input.
pin 2: A19 : Address input.
pin 3: GND : Ground.
pin 4: A18 : Address input.
pin 5: A5 : Address input.
pin 6: VCCO : 3.3V power supply for IC.
pin 7: VCCAUX : 2.5V power supply for AUX.
pin 8: A4 : Address input.
pin 9: A3 : Address input.
pin 10: GND : Ground.
pin 11: A2 : Address input.
pin 12: A1 : Address input.
- 10 -
96kHz 24Bit ADC
Mode at Power-down mode.
Master Mode at Power-down mode.
L = Power-down mode.
H = 24bit I2S compatible
L = 24bit MSB justified
12 Vo u t L P
D A C
11 Vo u t L N
D i g i t a l
F i l t e r s
9 Vo u t R P
D A C
10 Vo u t R N
2 D V D D
3 D G N D
17 Z e r o F l a g L
C o n t r o l
I n t e r f a c e
16 Z e r o F l a g R
FPGA