Table of Contents
Advertisement
A
B
C
SCHEMATIC DIAGRAM (DIGITAL)
1
Page 63
F8
Page 63
D5
Page 60
Page 61
L7
to POWER(4)
to POWER(5)
to INPUT(1)
to MAIN
2
Level Shift
5V
3.3V
3
DIGITAL INPUT
4
3.3
0
3.3
DIR
0
0
0
0
0
3.3
3.3
2.6
1.5
~
1.6
0.4
1
1.6
3.3
3.3
0
0
5
6
5.0
0.1
0.1
0.1
5.0
0.2
3.2
0.2
0
0.2
0.2
0.2
0.2
3.1
0.2
0.2
0.2
0.2
3.2
3.2
0.2
0.2
0.2
3.1
0
0.2
0.1
3.3
0.1
0.1
0
0.1
0.1
0
0.1
0.1
0
0
0.1
0
ADAM
1M SRAM
1.2
1.2
(DECODE DSP)
3.3
7
0.1
0
3.3
3.3
3.3
1.2
1.2
0
0
3.3
0
3.3
1.2
3.3
3.3
1.2
1.2
0
0
8
0
3.3
3.3
3.3
REGULATOR
9
IC319 : SN74AHCT08PWR
IC309 : 74VHC157MTCX
Quad 2 Input AND
2 to 1 Data Selectors
IC315–318 : µPC4570G2
INPUTS
Dual OP-Amp
A1
1
14
V
DD
V
CC
STROBE
4A
B1
2
13
B4
16
15
14
10
Y1
3
12
A4
G
4A
A2
4
11
Y4
S
OUT
1
1
8
+V
CC
B2
5
10
B3
1A
1B
–IN
1
2
7
OUT
2
+
–
+
–
+IN
1
3
6
–IN
2
Y2
6
9
A3
1
2
3
SELECT
1A
1B
–V
4
5
+IN
CC
2
V
SS
7
8
Y3
INPUTS
D
E
F
H1
Page 62
D7
Page 64
F3
to POWER(1)
to POWER(12)
0
5.0
0
5.0
2
0
5.2
0
0.1
0
0
0.1
0.1
MICRO COMPUTER
0.1
5.2
0.1
1.4
0
0.1
5.0
3.0
0
1.2
5.0
5.2
5.0
5.2
5.0
0.1
5.0
0
5.0
0
0
0
0
5.0
5.0
0
0
0
0.1
1.2
1.2
0
3.2
0.2
0.2
0.2
1.2
1.2
0
0
0
3.3
0
(POST PROCESSING DSP)
3.3
0.3
5.0
0.1
1.2
3.3
1.2
3.3
0
5.0
0
1.7
SURROUND L
1.7
1.7
3.3
0.9
0
0
0.7
0
0
0
0
0.7
1.3
1.3
1.3
1.3
2.5
1.7
1.7
CENTER
FRONT L
DIGITAL INPUT
IC303 : SN74LV245APWR
Octal 3-State Bus Transceivers
DIR
1
20 V
CC
A1
19 ENG
2
A2
3
18 B1
OUTPUT
INPUTS
OUTPUT
A3
4
17 B2
4B
4Y
3A
3B
3Y
13
12
11
10
9
A4
5
16 B3
A5
6
15 B4
4B
4Y
3A
3B
INPUTS
3Y
A6
7
14 B5
OUTPUT
SELECT STROBE
Y
G
1Y
2A
2B
2Y
A7
8
13 B6
X
H
L
L
L
A
H
L
B
A8
9
12 B7
4
5
6
7
8
1Y
2A
2B
2Y
GND
GND
10
11 B8
OUTPUT
INPUTS
OUTPUT
G
H
Page 60
E1
to INPUT(1)
FRONT L
SURROUND L
CENTER
3.0
0
0.1
0
SELECTOR
3.3
3.3
1.5
0
Page 58
H2
1.7
1.7
0.1
1.7
to INPUT(2)
0
0
DIGITAL INPUT
0
1.7
1.7
0
0
4M SDRAM
0
0
CODEC
0
0
0
1.7
0.1
0.1
1.5
0
0
CENTER
SURROUND L
FRONT L
2.5
2.0
2.2
2.3
2.6
2.5
EVE
2.3
2.2
2.2
2.2
2.2
3.3
1.7
1.7
SURROUND L
0
0
0
0.1
0.1
0.1
1.7
1.5
0
CENTER
FRONT L
IC301 : BS62LV1026SC-55
1M SRAM
A6
NC
1
32
VCC
A7
A12
A16
2
31
A15
Address
Row
Memory Arrey
A14
20
1024
A16
A14
3
30
CE2
Input
Decoder
1024 x 1024
A15
A13
A12
4
29
WE
A8
Buffer
A9
1024
A7
5
28
A13
A11
IC300 : PQ012FZ01ZP
A6
6
27
A8
Regulator
A5
7
26
A9
1024
A4
8
25
A11
DQ0
Column VO
8
8
DQ1
Data
A3
9
24
OE
DQ2
Input
Write Driver
DQ3
Buffer
A2
10
23
A10
Sense Amp
DQ4
8
DC INPUT (VIN)
1
DQ5
8
Data
A1
11
22
CE1
DQ6
Output
DQ7
126
Buffer
A0
12
21
DQ7
Column Decoder
DQ0
13
20
DQ6
DQ1
14
19
DQ5
14
CE2
CE1
DQ2
15
18
DQ4
Control
Address Input Buffer
WE
OE
GND
16
17
DQ3
Vdd
A5 A4 A3 A2 A1 A0 A10
Gnd
I
J
K
3
CUI
0
5.0
2.4
5.0
2.6
5.0
0
0
5.0
2.4
0
2.4
2.0
5.0
5.0
0.1
0.2
0
0
5.0
1.3
11.9
5.0
11.9
5.0
11.9
0
0
0
0
0
0
-11.7
CENTER
5.0
0
11.9
5.0
5.2
0
0.1
0
0
0.1
0
5.2
0
2.4
0
2.4
-11.7
0
SURROUND L
2.4
2.4
2.4
0
11.9
2.4
2.4
0
2.4
0
0
0
0
-11.7
FRONT L
0
11.9
0
0
0
0
-11.7
0
x : NOT USED
O: USED / APPLICABLE
3
DC OUTPUT (VO)
* All voltages are measured with a 10M Ω /V DC electronic volt meter.
I C
* Components having special characteristics are marked Z and
must be replaced with parts having specifications equal to
2
ON/OFF CONTROL (VC)
those originally installed.
5
* Schematic diagram is subject to change without notice.
GND
L
M
N
RX-SL80
Point q (Pin 29 of IC302)
V : 2V/div, H : 40nsec/div
DC, 1 : 1 probe
0V
Point w (Pin 13 of IC306)
V : 2V/div, H : 40nsec/div
DC, 1 : 1 probe
0V
Point e (Pin 28 of IC312)
V : 2V/div, H : 40nsec/div
DC, 1 : 1 probe
0V
IC311 : AK4628VQ
192kHz 24bit 8ch CODEC
SDOS
1
33
DZF2/OVF
I2C
2
32
RIN
SMUTE
3
31
LIN
BICK
4
30
NC
LRCK
5
TST2
29
SDTI1
6
28
ROUT1
SDTI2
7
27
LOUT1
SDTI3
ROUT2
8
26
SDTO
9
25
LOUT2
D AUX
10
24
ROUT3
DFS
11
23
LOUT3
A U D I O
L IN
A D C
H P F
I/F
MCLK
MCLK
R IN
A D C
H P F
LRCK
LRCK
BICK
BICK
DAUX
L OUT1
L P F
DAC
DATT
FORMAT
R OUT1
L P F
DAC
DATT
CONVERTER
L OUT2
L P F
DAC
DATT
SDOUT
R OUT2
L P F
DAC
DATT
SDOS
L OUT3
L P F
DAC
DATT
SDTO
R OUT3
L P F
DAC
DATT
SDIN1
SDTI1
SDTI2
L OUT4
L P F
DAC
DATT
SDIN2
SDIN3
SDTI3
SDIN4
SDTI4
R OUT4
L P F
DAC
DATT
IC308 : MSM514260E-60J3R1
262,144 word x 16 bit Dynamic RAM
VCC
1
40
VSS
DQ1
DQ16
2
39
DQ2
3
38
DQ15
DQ3
DQ14
4
37
DQ4
5
36
DQ13
VCC
6
35
VSS
DQ5
7
34
DQ12
DQ6
8
33
DQ11
DQ7
9
32
DQ10
DQ8
10
31
DQ9
NC
NC
11
30
NC
12
29
LCAS
WE
13
28
UCAS
RAS
14
27
OE
NC
15
26
A8
A0
16
25
A7
A1
17
24
A6
A2
A5
18
23
A3
19
22
A4
VCC
20
21
VSS
WE
OE
TIMING
RAS
GENERATOR
I/O
CONTROLLER
LCAS
OUTPUT
UCAS
8
8
I/O
BUFFERS
CONTROLLER
DQ1~DQ8
COLUMN
COLUMN
9
ADDRESS
9
INPUT
DECODERS
8
8
BUFFERS
BUFFERS
SENSE
I/O
16
16
INTERNAL
REFRESH
AMPLIFIERS
SELECTOR
A0~A8
ADDRESS
CONTROL CLOCK
COUNTER
INPUT
8
8
BUFFERS
ROW
ROW
WORD
MEMORY
9
ADDRESS
9
DQ9~DQ16
DECODERS
DRIVERS
CELLS
BUFFERS
OUTPUT
8
8
BUFFERS
VCC
ON CHIP
VBB GENERATOR
VSS
* 電圧は、内部抵抗10MΩの電圧計で測定したものです。
* Z印のある部品は、安全性確保部品を示しています。部品の交換が必要な場合、
パーツリストに記載されている部品を使用してください。
* 本回路図は、標準回路図です。改良のため予告なく変更することがございます。
59
- Quick Links:
- Parts List
Hide quick links:
Advertisement
Table of Contents
