JVC RX-7030VBK Service Manual page 20

4.6 DSPD56367PV150 (IC501) : DSP
• Pin layout
108
109
144
1
• Block diagram
1
DAX
TRIPLE
(SPDIF Tx.)
TIMER
INTER-FA
CE
ADDRESS
GENERATION
SIX CHANNELS
DMA UNIT
INTERNAL
DATA
BUS
PLL
CLOCK
GENERAT
EXTAL
RESET
PINIT/NMI
1-20 (No.22058)
73
72
37
36
8 4
2 16
6
ESAI
HOST
INTER-
INTER-
FACE
FACE
ESAI_1
PERIPHERAL
EXPANSION AREA
UNIT
24-BIT
DSP56300
Core
PROGRAM PROGRAM
INTERRUPT DECODE
CONTROLLER CONTROLLER
MODA/IRQA
MODB/IRQB
MODC/IRQC
MODD/IRQD
5
MEMORY EXPANSION AREA
PROGRAM
RAM
SHI
X MEMORY
/INTERFACE
INTER- RAM
3K x 24
13K x 24
FACE
PROGRAM
ROM
ROM
32K x 24
40K x 24
Bootstrap
YAB
XAB
PAB
DAB
DDB
YDB
XDB
PDB
GDB
DATA ALU
PROGRAM
+ ->
24X24 56 56-BIT MAC
ADDRESS
TWO 56-BIT ACCUMULATORS
GENERATOR
BARREL SHIFTER
Y MEMORY
RAM
7K x 24
ROM
8K x 24
18
EXTERNAL
ADDRESS
BUS
ADDRESS
SWITCH
DRAM &
10
SRAM BUS
INTERFACE
&
CONTROL
I-CACHE
24
EXTERNAL
DATA BUS
SWITCH
DATA
POWER
MNGMNT
4
JTAG
™
OnCE
24 BITS BUS