JVC RX-7030VBK Service Manual page 18

4.5 AK4527BVQP (IC571) : A/D, D/A converter
• Pin layout
SDOS 1
I2C 2
SMUTE 3
BICK 4
LRCK 5
SDTI1 6
SDTI2 7
SDTI3 8
SDTO 9
D.AUX 10
DFS 11
• Pin function
Pin No. Symbol I/O
1 SDOS I
2 I2C I
3 SMUTE I
4 BICK I
5 LRCK I/O
6 SDTI1 I
7 SDTI2 I
8 SDTI3 I
9 SDTO O
10 D.AUX I
11 DFS I
12 NC -
13 DZFE I
14 TVDD O
15 DVDD -
16 DVSS -
17 PDN I
18 TST I
1-18 (No.22058)
33 DZF2
32 RIN+
31 RIN-
30 LIN+
29 LIN-
28 ROUT1
27 LOUT1
26 ROUT2
25 LOUT2
24 ROUT3
23 LOUT3
SDTO Source select pin
"L" : Internal ADC output, "H" : DAUX input
ORed with serial control register if P/S="L".
MCKO Clock frequency select pin
"L" : MCLK "H" : MCLK/2.
ORed with serial control register if P/S= "L".
Connect to GND
Audio serial data clock pin
Input/Output channel clock pin
DAC1 Audio serial data input pin
DAC2 Audio serial data input pin
DAC3 Audio serial data input pin
Audio serial data output pin
AUX Audio serial data input pin
Double speed sampling mode pin
"L" : Normal speed "H" : Double speed the ADC is powered down.
ORed with serial control register if P/S="L".
De-emphasis pin
ORed with serial control register if P/S="L"
De-emphasis Pin
ORed with serial control register if P/S="L"
Master clock output pin
Digital power supply pin
Digital ground pin
Power-down & Reset pin
When "L", the AK4527 is powered-down and the control registers are reset to default state. If the
state of CAD0-1 changes then the AK4527 must be reset by PDN.
X'tal oscillator Select/Test mode pin
"H" : X'tal Oscillator selected
"L" : External clock source selected
• Block diagram
LIN+
ADC
HPF
LIN-
RIN+
HPF
ADC
RIN-
DAC
LOUT1 LPF
DAC
ROUT1
LPF
DAC
LOUT2 LPF
ROUT2
DAC
LPF
LPF DAC
LOUT3
LPF DAC
ROUT3
Block Diagram (DIR and AC-3) DSP are external parts)
Function
Audio
I/F
LRCK
DATT
BICK
MCLK
DATT
Format
Converter
SDOUT
DATT
DATT
DATT
SDIN1
SDIN2
DATT
SDIN3
D.AUX
SDOS
SDTO
SDTI1
SDTI2
SDTI3