Serial Peripheral Interface (Spi) Bus; Figure 3-47. Serial Peripheral Interface (Spi) Block Diagram - Motorola ASTRO XTL 1500 Detailed Service Manual

Theory of Operation: Controller Section

3.14.8 Serial Peripheral Interface (SPI) Bus

The microcontroller (U100) utilizes an SPI bus for configuring and operating specific ICs in the
controller and RF sections of the radio. The SPI bus is a synchronous serial bus made up of four
lines (see Figure 3-47 on page
the IC and the microcontroller. If necessary, this clock speed can be adjusted to a different value for
each IC.
The Data-OUT pin receives a data string from the microcontroller. The Data-IN pin sends a serial
data string to the microcontroller, usually to indicate what the current programmed values are of the
IC. The Chip Select pin is used to select which single IC is currently being programmed. Each ICs
Chip Select pin is hardwired to a specific SPI bus and can only be controlled by that bus. The
microcontroller pulls the ICs chip-select line LOW to enable the IC for receiving configuration data,
for programming, or for sending out its existing configuration state. Additional SPI buses allow chip
selecting to occur in parallel. Therefore, the operations on each SPI bus do not add any delay to the
activities occurring on another SPI bus.
SCKA
ABACUS
MOSIA
U6000
ABACUS3_CS*
SCKA
MOSIA
LV FRAC-N
MISOA
U6751
SYN_SEL*
SCKA
MOSIA
A/D
U0953
MISOA
AD_EN*
The following ICs are controlled and programmed by SPI_A:
• ABACUS III (U6000): Sigma Delta A/D converter and 2nd LO frequency adjust. The
ABACUS III IC has a single pin for both input and output. Therefore, additional circuitry (U0103
and U0105) handles the SPI_MISO or the SPI_MOSI data lines from the microcontroller and
allows a read or write operation to occur with the ABACUS III IC via a single bidirectional data
line.
• A/D (U0953): monitors temperature, source voltage, PA current, feedback-voltage loop,
forward-detected voltage, and reverse-detected voltage
• D/A (U0959) (microcontroller only writes to IC): controls bias stages 1-4, sets current limit,
monitor thermistors, tuner overall RF power, and adjusts RX filter
6815854H01-A
3-71). The CLK line is used to control the speed of the data to/from
QSCKA
MOSIA
SPICS8
MISOA
SPICS4
SPICS6

Figure 3-47. Serial Peripheral Interface (SPI) Block Diagram

SPICS9
PATRIOT
U100
SPICS5
SCKA
D/A
MOSIA
U0959
DA_EN*
SCKA
LOG POT
MOSIA
U0206
EEPOT_3_CS*
MAEPF-27820-O
June 15, 2005
3-71