Pcl Output Confirmation - Pioneer DEX-P99RS/UC Service Manual

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DC-DC CONVERTER FREQUENCY ADJUSTMENT
Adustment condition
A
1. DC-DC CONVERTER output : -8 V(-8.3 V), Load resistance : 330 ohm (more than 1 W)
2. DDFCNT : LOW (0 V), SYSPW : HIGH (3.3 V)
3. DDFCNT : HIGH (3.3 V), SYSPW : HIGH (3.3 V)
Measurement point
1. Output voltage
TP AM8, GND
2, 3. Oscillation frequency
TP FREQ1, GND
No.
Adustment
B
1
-8.3 V ± 0.5 V
2
370 kHz ± 5 kHz
3
400 kHz ± 10 kHz
C
TE
L 13942296513

8.4 PCL OUTPUT CONFIRMATION

- PCL output
D
In the normal operation mode (with the detachable panel installed, the ACC switched ON, the standby mode
cancelled), shift the TESTIN IC601(Pin 126) terminal to H.
The clock signal is output from the PCL terminal IC601(Pin 62).
The frequency of the clock signal is 625 000 Hz that is one 32th of the fundamental frequency.
The clock signal should be 625 000 Hz (- 10 Hz, + 15 Hz)
If the clock signal out of the range, the X'tal (X601) should be replaced with new one.
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Measurement point
AM8, AM8V
FREQ1, FREQ2
FREQ1, FREQ2
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8
Adustment point
VR921
VR921
Q Q
3
6 7
1 3
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3
4
2 9
9 4
2 8
Note
DDFCNT : LOW
DDFCNT : HIGH
1 5
0 5
8
2 9
9 4
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4
9 9
2 8
9 9

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