Denon ADV-700 Service Manual page 20

Dvd surround receiver
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ES4408F (DVD: IC101)
TDMDX/RSEL
TWS/SEL_PLL1
TSD/SEL_PLL0
SPDIF_DOBM
ES4408F Terminal Function
Pin No.
Pin Name
I/O
1
Vcc
I
3.6V power supply
2
LA 4
O
Device address output
3
LA 5
O
Device address output
4
LA 6
O
Device address output
5
LA 7
O
Device address output
6
LA 8
O
Device address output
7
LA 9
O
Device address output
8
Vss
I
GND
9
Vcc
I
3.6V power supply
10
LA 10
O
Device address output
11
LA 11
O
Device address output
12
LA 12
O
Device address output
13
LA 13
O
Device address output
14
LA 14
O
Device address output
15
LA 15
O
Device address output
16
LA 16
O
Device address output
17
Vss
I
GND
18
Vcc
I
3.6V power supply
19
LA 17
O
Device address output
20
LA 18
O
Device address output
21
LA 19
O
Device address output
22
LA 20
O
Device address output
23
LA 21
O
Device address output
24
RESET#
I
Reset input, active low
TDMDX
O
TDM transmit data
25
RSEL
I
ROM select
26
Vss
I
GND
27
Vcc
I
3.6V power supply
28
TDMDR
I
TDM receive data
Vcc
1
LA4
2
LA5
3
LA6
4
LA7
5
LA8
6
LA9
7
Vss
8
Vcc
9
LA10
10
LA11
11
LA12
12
LA13
13
LA14
14
LA15
15
LA16
16
Vss
17
Vcc
18
LA17
19
LA18
20
LA19
21
LA20
22
LA21
23
RESET#
24
25
Vss
26
Vcc
27
TDMDR
28
TDMCLK
29
TDMFS
30
TDMTSC#
31
32
33
Vss
34
Vcc
35
TSD1
36
TSD2
37
TSD3
38
MCLK
39
TBCK
40
41
NC
42
Vss
43
Vcc
44
RSD
45
RWS
46
RBCK
47
APLLCAP
48
XIN
49
XOUT
50
Vcc
51
Vss
52
Function
156
Vss
155
HA1
154
HA0
153
HCS3FX#
152
HCS1FX#
151
HIOCS16#
150
HRD#/DCI_ACK#
149
HWR#/DCI_CLK
148
Vcc
147
Vss
146
HIORDY
145
HRST#
144
HIRQ/DCI_ERR#
143
HRDQ#
142
HWRQ#/DCI_REQ#
141
HD15
140
HD14
139
Vcc
138
Vss
137
HD13
136
HD12
135
HD11
134
HD10
133
HD9
132
HD8/DCI_FDS#
131
HD7/DCI7
130
Vcc
129
Vss
128
HD6/DCI6
127
HD5/DCI5
126
HD4/DCI4
125
HD3/DCI3
124
HD2/DCI2
123
HD1/DCI1
122
HD0/DCI0
121
Vcc
120
Vss
119
HSYNCH#
118
VSYNCH#
117
PCLKQSCN
116
PCLK2XSCN
115
YUV7
114
YUV6
113
YUV5
112
Vss
111
Vcc
110
YUV4
109
YUV3
108
YUV2
107
YUV1
106
YUV0
105
DCLK
Pin No.
Pin Name
I/O
29
TDMCLK
I
TDM clock input
30
TDMFS
I
TDM frame sync
31
TDMTSC#
O
TDM output enable, active low
TWS
O
Audio transmit frame sync
32
SEL_PLL1
I
Select PLL1
TSD0
O
Audio transmit serial data port0
33
SEL_PLL0
I
Select PLL0
34
Vss
I
GND
35
Vcc
I
3.6V power supply
36
TSD1
O
Audio transmit serial data port1
37
TSD2
O
Audio transmit serial data port2
38
TSD3
O
Audio transmit serial data port3
39
MCLK
I/O
Audio master clock for audio DAC
40
TBCK
I/O
Audio transmit bit clock
41
SPDIF_DOBM
O
S/PDIF (IEC958) format output
42
NC
No connect pin
43
Vss
I
GND
44
Vcc
I
3.6V power supply
45
RSD
I
Audio receive serial data
46
RWS
I
Audio receive frame sync
47
RBCK
I
Audio receive bit clock
48
APLLCAP
I
Analog PLL capacitor
49
XIN
I
Crystal input
50
XOUT
O
Crystal output
51
Vcc
I
3.6V power supply
52
Vss
I
GND
53
DMA 0
O
DRAM address bus
54
DMA 1
O
DRAM address bus
55
DMA 2
O
DRAM address bus
ADV-700
Function
20

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