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Denon D-107 Service Manual page 26

Hi-fi personal component system
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M66004FP (IC701)
D I G
D I G
1
6 4
1 2
1 1
2
6 3
D I G
D I G
1 0
1 3
3
6 2
D I G
D I G
0 9
1 4
D I G
D I G
4
6 1
1 5
0 8
D I G
5
6 0
V c c 2
0 7
D I G
6
5 9
S E G
0 6
0 0
D I G
S E G
0 5
7
5 8
0 1
D I G
8
5 7
S E G
0 4
0 2
D I G
9
5 6
S E G
0 3
0 3
C h i p S e l e c t I n p u t
D I G
1 0
5 5
S E G
0 2
0 4
D I G
1 1
5 4
0 1
S E G
S h i f t C l o c k I n p u t
0 5
D I G
1 2
5 3
0 0
S E G
0 6
S e r i a l D a t a I n p u t
R E S E T
1 3
5 2
S E G
0 7
C S
1 4
5 1
S E G
0 8
S C K
1 5
5 0
S E G
0 9
S D A T A
1 6
4 9
S E G
1 0
P I
1 7
4 8
S E G
1 1
P O
1 8
4 7
S E G
1 2
V c c 1
1 9
4 6
S E G
1 3
X
2 0
4 5
S E G
o u t
1 4
S E G
X
2 1
4 4
i n
1 5
V s s
2 2
4 3
S E G
1 6
S E G
2 3
4 2
S E G
3 5
1 7
2 4
4 1
S E G
S E G
3 4
1 8
S E G
2 5
4 0
S E G
3 3
1 9
S E G
2 6
3 9
S E G
3 2
2 0
S E G
3 8
2 7
S E G
3 1
2 1
S E G
2 8
3 7
S E G
3 0
2 2
S E G
2 9
3 6
S E G
2 9
2 3
S E G
3 0
3 5
S E G
2 8
2 4
S E G
3 1
3 4
2 7
S E G
2 5
V p
3 2
3 3
S E G
2 6
M66004FP Terminal Function
Symbol
Name
RESET
Reset Input
CS
Chip Select Input
SCK
Shift Clock Input
SDATA
Serial Data Input
X
Clock Input
IN
X
Clock Output
OUT
DIG 00~
Digit Output
DIG 15
SEG 00~
Segment Output
SEG 35
P0, P1
V
CC1
V
CC2
Vss
Vp
(Forwarding connection of segment output terminal.)
in the right figure indicates 1 dot of segment, the figure in
terminal number (00~35) to be connected.
D i s p l a y C o d e R e g i s t e r
C S
1 4
S e r i a l
S C K
1 5
R e c e p t i o n
C i r c u i t
S D A T A
1 6
C o d e /
C o m m a n d
C o n t r o l C i r c u i t
D i s p l a y C o n t r o l
1 3
R e s e t I n p u t R E S E T
R e g i s t e r
C l o c k
C l o c k I n p u t
X I N
2 1
G e n e r a t i o n
C i r c u i t
C l o c k O u t p u t X O U T
2 0
Initialzes internal state of M66004.
Able to communicate with MCU in "L" mode.
Command from MCU will be disregareded in "H" mode.
Shifts input data at rise from "L" to "H".
Inputs character code or command data needed to display from MSB.
Sets oscillation frquency by connecting external resistor and capacitor (maximum
oscillation frequency fosc (max)=1MHz). Also feasible to apply external clock. In this case,
inject external clock to Xin terminal and open Xout terminal.
Connect to digit terminal of VFD. DIG00~DIG15 correspond to the 1st figure to 16th figure
respectively.
Connect to segment terminal of VFD. For corresponding SEG00~SEG35 to segment
terminal of VFD, refer to the figure right.
Output port (static operation).
Positive power supply terminal for internal logic.
Positive power supply terminal for high tension output port.
GND terminal.
Negative power supply terminal for VFD drive.
C G R O M
( 3 5 - b i t x 1 6 0 )
( 8 - b i t x 1 6 )
c o d e
w r i t e
C G R O M
( 3 5 - b i t x 1 6 )
R A M
w r i t e
c o d e s e l e c t
D i s p l a y C o n t r o l l e r
Function
shows the segment output
D-107
S E G
5 9
0 0
S e g m e n t
S E G
3 3
2 6
S e g m e n t
O u t p u t
S E G
3 1
O u t p u t
2 7
C i r c u i t
S E G
2 3
3 5
O u t p u t P o r t
P 0
1 8
O u t p u t P o r t
( 2 - b i t )
P 1
1 7
D I G
1 2
0 0
D I G
1
1 1
D i g i t O u t p u t
D i g i t O u t p u t
C i r c u i t
D I G
6 4
1 2
D I G
6 1
1 5
00 01 02 03 04
05 06 07 08 09
10 11 12 13 14
15 16 17 18 19
20 21 22 23 24
25 26 27 28 29
30 31 32 33 34
35
26

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