Samsung HLR4677WX/XAA Service Manual page 22

Alignment and Adjustments
2-9-3 DMD Panel Pin Terminal Characteristics Diagram
※ Remove the heat sink attached to the DMD Board and tighten the screws in four places and then inspect the characteristics of
each pin terminal.
Pin Name
V Voltage : 3.3V
V2 VCC2 : 8V
DA A Channel Data Bus [When measured, there should be a waveform]
DB B Channel Data Bus [When measured, there should be a waveform]
No. MBRST# (Mirror Bias Rest) 26V
The part from the present position to the GND
G
(The black part is also a GND.)
2-9-4 Description of Terminal Characteristics
PIN NAME
SCTRL_BN/P
DCLK_BN/P
SCPDI
SCPDO
SCPENB
SCPCK
DMD RESETB
MBRST(14:0)
MBRST_EXTRA
SCR_CLR
READOUTA(1:0)
READOUTB(1:0)
TP(2:0)
RSV_A(4:0)/RSV_B(4:0)
EVCC
VCC2
VCC
VSS
2-18
The vertical lines, which may occur due to improper connections between the panel and the
PCB, occur with intervals of 50 inches(26mm). If vertical lines occur with intervals of more than
26mms, it indicates a failure of the DDP1011 IC itself. If they occur with intervals of less than
26mm, it means that more than two pins have bad connections.
DA,DB output wave
[Screen:WHITE]
Description
B channel LVDS serial control
B channel LVDS CLOCK
SERIAL CONTROL DATA INPUT
SERIAL CONTROL DATA OUTPUT
SERIAL CONTROL ENABLE
SERIAL CONTROL CLOCK
DMD LOGIC RESET
MIRROR BIAS RESET
UNUSED MIRROR BIAS RESET
TEST CLEAR PINS(NORMAL GND)
A-CHANNEL SERIAL DATA OUT DURING SPAM READ TEST OPERATION
B-CHANNEL SERIAL DATA OUT DURING SPAM READ TEST OPERATION
MANUFACTORING TEST POINT(NO CONNECTED DURING NORMAL CPERATION)
RESERVED PINS(NORMAL:GND)
REFERENCE VOLTAGE DURING SPAM READ TEST OPERATION(NORMAL GND)
MIRROR ELECTRODE VOLTAGE(7.3V)
LOGIC SUPPLY
LOGIC GROUND
Pin Name
T Test Point
ME Mirror Bias Extra
C Clock
P# A,B Channel Positive
N# A,B Channel Negative
DESCRIPTION
Description
Samsung Electronics