Operational Description - Sharp ZQ-5000 Service Manual

IN OUT IN OUT
used in pairs with LH5073A. The display section power VFF, liquid
crystal drive power VDP,VA, VM, and synchronization signal HA of
VM and display divider are supplied from the output terminals of the
same names of LH5073A.
Display data are in 8 bit unit, and asynchronous read/write from/to the
built-in display RAM is enabled. One bit data of the display RAM
corresponds to one dot on/off of the liquid crystal panel. Display
output is provided in l/32 duty by g&segment dirver.
Display control signal VDD input and DIS input should be the same
as those of LH5073A. Every time when DIS input is turned from L to
timing chart of the display circuit are shown below:
Control input
VDD
Stop (H or L)
l
Operation
Operation
The internal ROM operation mode is shown below:
HZ
Address input
Data input
Data output
(NOTE) When reading/writing data, turn E input to " H" to bring
about pre-charge state for every cycle.
VEE
VCC
Input signal from LH5073
HA VFF, VDP, VA, VM, VB
Stop (GND level)
Operation
Operation
Operation mode
Address write
Data write
Data read
VFF
VDP
Supplied from
VA
HI
Display OFF (Segment OFF waveform)
I
Segment driver
I
IN OUT IN OUl
Operation mode
Standby
Display mode
VEE
VCC