Fujitsu primequest 2400E2 Design Manual page 33

2.2.1 CPU (3/5)
QuickPath Interconnect (QPI)

•A high-speed system bus delivering up to 9.6GT/s (bandwidth 38.4GB/s)
•The QPI connects a CPU and a chipset or connects CPUs to each other.
CPU Installation Conditions

For details, refer to "Appendix G Component Mounting Conditions" in
"Administration Manual".
•CPUs must be installed from CPU#0 on an SB in the order of the slot numbers.
•SBs in which no CPU is installed cannot be incorporated in a PPAR block.
•At least one set of memory modules (two modules) must be installed for a CPU.
Conditions for Installing Different CPUs

Different types of CPUs can be installed in different PPAR blocks.
(The CPUs must be supported in the PRIMEQUEST model.)
PRIMEQUEST 2000 Series Design Guide 32 Copyright 2016-2017 FUJITSU LIMITED