Philips DVDR985 Technical Training Manual page 59

Encoder/Decoder/HDR65
The Encoder/Decoder has the following func-
tions:
· Encoder for DVD+RW. This part creates the
EFM+ (16 bit) signals from the I2S data
stream.
· Decoder for DVD and CD. This part process-
es the HF-signal from the SPIDRE. It con-
verts the EFM(+) signals to data, and per-
forms error detection and error correction.
· Output to SPIDRE pre-processor for RF-
AGC.
This IC decodes EFM or EFM+HF signals direct-
ly from the SPIDRE. These include: HF, PLL
data recovery, demodulation, and error correc-
tion.
The Encoder/Decoder has two independent
microcontroller interfaces. The first is a serial I 2 C
bus and the second is a standard 8 bit multi-
plexed parallel interface. Both of these interfaces
provide access to 32k of SRAM 8-bit registers
for control and status.
The analog front-end input on Pins 9 and 10
converts the HF input to the digital domain via an
8-bit A/D converter. The A/D is supplied by an
AGC circuit to obtain the optimum performance
from the converter. An external oscillator is sup-
plied for this subsystem to recover the data from
the channel stream. It corrects asymmetry, per-
forms noise filtering and equalization, and finally
recovers the bit clock and data from the channel
using a digital PLL.
The demodulator portion detects the frame syn-
chronization signals and decodes the EFM (14
bit) and EFM+ (16 bit) data and sub-code words
into 8-bit symbols. Via the serial output interface,
the I 2 S data (audio and video) go to the
DVD+RW interface.
The spindle-motor interface provides both motor
control signals from the demodulator and, in
addition, contains a tachometer loop that accepts
tachometer pulses from the motor unit. The
motor is a standard three phase motor. Motor
speed is controlled by the Wobble Processor
during record. During playback the Wobble
processor is monitoring the Data stacked up in
the SRAM of 7204. The Motor control signal is
on Pin 98 which supplies the drive IC 7301.
AWESOME
AWESOME stands for: Adip decoding, Wobble
processing, Error correction, Synchronous
start/stop and Occasionally Mend Errors.
The AWESOME gate array chip, IC 7401, is a
fully digital DVD+RW add-on for the HDR65. A
combination of both ICs can do CD and DVD
decoding and CD, DVD-R(W), and DVD+RW
encoding. It contains logic for:
· Wobble processing
· Address detection
· Write clock generation
· Start and stop
· ADdress In Pregroove decoding, Adip
· Spindle motor control to do CLV on wobble
· Link bits insertion (according to DVD+RW
standard).
· Output to SPIDRE pre-processor for wobble-
AGC
It also receives the serial interface signal from
the Encoder/Decoder IC on Pins 6, 7, and 8 and
merges the internal serial bus to be sent to the
analog pre-processor (SPIDRE), on pins 72, 78,
and 79.
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