Memory(H9DaGh1Ghmmmr, U301) - LG -T510 Service Manual

Hide thumbs Also See for LG-T510:
Table of Contents

Advertisement

3. TECHNICAL BRIEF
3.6 MEMORY(H9DA2GH1GHMMMR, U301 )
Figure. 3.6.1 MEMORY BLOCK DIAGRAM
Hynix NAND Flash is a 128Mx16bit with spare 4Mx16 bit capacity.
The device is offered in 1.8 Vcc Power Supply, and with x16 I/O interface.
Its NAND cell provides the most cost-effective solution for the solid state mass storage market.
The memory is divided into blocks that can be erased independently so it is possible to preserve valid data
while old data is erased.
The device contains 2048 blocks, composed by 64 pages.
Memory array is split into 2 planes, each of them consisting of 1024 blocks.
Like all other 2KB - page NAND Flash devices, a program operation allows to write the 2112-byte page in
typical 250us and an erase operation can be performed in typical 3.5ms on a 128K-byte block.
In addition to this, thanks to multi-plane architecture, it is possible to program 2 pages at a time (one per each
plane) or to erase 2 blocks at a time (again, one per each plane). As a consequence, multi-plane architecture
allows program time to be reduced by 40% and erase time to be reduction by 50%. In case of multi-plane
operation, there is small degradation at 1.8V application in terms of program/erase time..
LGE Internal Use Only
- 40 -
Copyright © 011 LG Electronics. Inc. All right reserved.
Only for training and service purposes

Advertisement

Table of Contents
loading

Table of Contents