Monitoring Signaling Bits - HP 37717C User Manual

Making Measurements

Monitoring Signaling Bits

Monitoring Signaling Bits
Description The HP 37717C receiver can be used to monitor the state of signaling
bits in received 2 Mb/s signals with timeslot-16 CAS (PCM30 or
PCM30CRC) multiframing, structured or unstructured, and also in DS1
structured signals (Option 110 instruments).
The HP 37717C transmitter can be configured to generate these signals
and the state of the signaling bits defined by the user, as follows:
2.048 Mb/s Signal When transmitting a 2.048 Mb/s signal, (or a 2.048 Mb/s signal as part of
a higher rate structured signal) with timeslot-16 CAS (PCM30 or
PCM30CRC) multiframing the state of A,B,C,D signaling bits can be set.
The signaling bits of all timeslots are set to the user-defined 4 bit value.
DS1 Signal When transmitting a DS1 framed, structured signal or a DS3 signal
(Option 110) structured down to DS1, the values of the A,B signaling bits for D4 and
SLC-96 payloads, and A,B,C,D signaling bits for ESF payloads can be
defined. In the Transmitter signaling is only offered for a 56 kb/s or Nx56
kb/s Test Signal.
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